📄 conf_tny.lst
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412 ;---- Variable 'next' assigned to Register 'R7' ----
413 ;---- Variable 'i' assigned to Register 'R0' ----
414 ;---- Variable 'limit' assigned to Register 'R5' ----
415 ;
416 ;------------------------------------------------
417
007C 418 os_switch_task:
419
420 IF (CODE_BANKING <> 0)
PUSH ?B_CURRENTBANK
ENDIF
423
007C 424 os_switch_task1:
425
426 ; next = current;
427 IF (TIMESHARING <> 0)
007C D200 F 428 SETB ?RTX_TS_DELAY ; Delay Task Switching
429 ENDIF
007E E50C 430 MOV A,?RTX_CURRENTTASK
0080 FF 431 MOV R7,A
432 ; while (1) {
0081 23 433 RL A
0082 2400 F 434 ADD A,#?RTX?TASKSTATE?S+1
0084 F8 435 MOV R0,A
0085 436 ?C0001:
437 ; if (++next == MAXTASKN+1) next = 0;
0085 0F 438 INC R7
0086 08 439 INC R0
0087 08 440 INC R0
441 IF (CPU_IDLE_CODE)
0088 EF 442 MOV A,R7
0089 B50C06 443 CJNE A,?RTX_CURRENTTASK,NoIDLE
008C 100003 F 444 JBC ?RTX_ISR_SIG,NoIDLE
445 CPU_IDLE ; CPU sleep
0092 447 NoIDLE:
448 ENDIF
0092 BF0004 F 449 CJNE R7,#?RTX_MAXTASKN+1,?C0003
0095 7F00 450 MOV R7,#0
0097 7800 F 451 MOV R0,#?RTX?TASKSTATE?S+1
0099 452 ?C0003:
453 ; if (STATE[next].st & K_READY) break;
0099 E6 454 MOV A,@R0
009A 30E4E8 455 JNB ACC.B_READY,?C0001
456 ; }
457 ;
458
459 PUBLIC ?RTX_NEXTID
A51 MACRO ASSEMBLER CONF_TNY 04/26/2009 16:07:33 PAGE 8
460 PUBLIC ?RTX_NEXTTASK
461
0007 462 ?RTX_NEXTID EQU AR7
009D 00 463 ?RTX_NEXTTASK: NOP ; for Debugging
464
465 ; while (current < next) {
009E 466 ?C0005:
009E E50C 467 MOV A,?RTX_CURRENTTASK
00A0 C3 468 CLR C
00A1 9F 469 SUBB A,R7
00A2 5020 470 JNC ?C0011
471
472 ; current++;
00A4 050C 473 INC ?RTX_CURRENTTASK
474 ; i = STKP[current];
00A6 7400 F 475 MOV A,#?RTX?TASKSP?S
00A8 250C 476 ADD A,?RTX_CURRENTTASK
00AA F8 477 MOV R0,A
00AB E6 478 MOV A,@R0
00AC FD 479 MOV R5,A
480 ; STKP[current] = SP;
00AD A681 481 MOV @R0,SP
482 ; if (current == MAXTASKN) limit = RAMTOP;
00AF 08 483 INC R0
00B0 E6 484 MOV A,@R0
00B1 AE0C 485 MOV R6,?RTX_CURRENTTASK
00B3 BE0002 F 486 CJNE R6,#?RTX_MAXTASKN,?C0007
00B6 747F 487 MOV A,#RAMTOP
00B8 488 ?C0007:
00B8 CD 489 XCH A,R5
00B9 F8 490 MOV R0,A
491 ; else limit = STKP[current+1];
492 ;
493 ; while (i != limit) {
00BA 494 ?C0009:
00BA E8 495 MOV A,R0
00BB 6D 496 XRL A,R5
00BC 60E0 497 JZ ?C0005
498 ; SP++;
499 ; i++;
500 ; STACK[SP] = STACK[i];
00BE 08 501 INC R0
00BF E6 502 MOV A,@R0
00C0 C0E0 503 PUSH ACC
00C2 80F6 504 SJMP ?C0009
505 ; }
506 ; }
00C4 507 ?C0011:
508 ;
509 ; while (current > next) {
00C4 E50C 510 MOV A,?RTX_CURRENTTASK
00C6 D3 511 SETB C
00C7 9F 512 SUBB A,R7
00C8 4027 513 JC ?C0012
514
00CA E50C 515 MOV A,?RTX_CURRENTTASK
00CC 2400 F 516 ADD A,#?RTX?TASKSP?S+1
00CE F8 517 MOV R0,A
00CF E6 518 MOV A,@R0
519 ; if (current == (MAXTASKN)) i = RAMTOP;
520 ; else i = STKP[current+1];
00D0 AE0C 521 MOV R6,?RTX_CURRENTTASK
00D2 BE0002 F 522 CJNE R6,#?RTX_MAXTASKN,?C0013
00D5 747F 523 MOV A,#RAMTOP
00D7 524 ?C0013:
00D7 FD 525 MOV R5,A
A51 MACRO ASSEMBLER CONF_TNY 04/26/2009 16:07:33 PAGE 9
526 ; limit = STKP[current];
00D8 18 527 DEC R0
00D9 E6 528 MOV A,@R0
00DA CD 529 XCH A,R5
00DB F8 530 MOV R0,A
531 ;
532 ; while (SP != limit) {
00DC 533 ?C0015:
00DC E581 534 MOV A,SP
00DE 6D 535 XRL A,R5
00DF 6006 536 JZ ?C0016
537 ; STACK[i] = STACK[SP];
538 ; i--;
539 ; SP--;
00E1 D0E0 540 POP ACC
00E3 F6 541 MOV @R0,A
00E4 18 542 DEC R0
543
00E5 80F5 544 SJMP ?C0015
00E7 545 ?C0016:
546 ; }
547 ; STKP[current] = i;
00E7 E50C 548 MOV A,?RTX_CURRENTTASK
00E9 2400 F 549 ADD A,#?RTX?TASKSP?S
00EB C8 550 XCH A,R0
00EC F6 551 MOV @R0,A
552 ; current--;
00ED 150C 553 DEC ?RTX_CURRENTTASK
00EF 80D3 554 SJMP ?C0011
00F1 555 ?C0012:
556 ; }
557
558 ; RoundRobinTime = ?RTX_TIMESHARING
559 IF (TIMESHARING)
00F1 750D05 560 MOV ?RTX_ROBINTIME,#TIMESHARING
561 ENDIF
562
563 ; if (STATE[current].st & K_ROBIN) goto RobinOn;
00F4 E50C 564 MOV A,?RTX_CURRENTTASK
00F6 23 565 RL A
00F7 2400 F 566 ADD A,#?RTX?TASKSTATE?S+1
00F9 F8 567 MOV R0,A
00FA 7F04 568 MOV R7,#SIG_EVENT
00FC C2AF 569 CLR EA
00FE E6 570 MOV A,@R0
571 IF (TIMESHARING)
00FF 10E61E 572 JBC ACC.B_ROBIN,RobinOn
573 ENDIF
574 ; if ((STATE[current].st & K_SIG) && (STATE[current].st & SIG_EVENT)
575 ; goto SignalOn;
0102 30E003 576 JNB ACC.B_WAITSIG,SignalOff
0105 10E20C 577 JBC ACC.B_SIGNAL,SignalOn
0108 578 SignalOff:
579 ; if ((STATE[current].st & K_TMO) && (STATE[current].st & TMO_EVENT)
580 ; goto TimeOutOn;
0108 7F00 581 MOV R7,#0 ; No Event
010A 30E107 582 JNB ACC.B_WAITTIM,NoEvent
010D 30E304 583 JNB ACC.B_TIMEOUT,NoEvent
0110 584 TimeOutOn:
0110 7F08 585 MOV R7,#TMO_EVENT
0112 54F4 586 ANL A,#0F4H
0114 587 SignalOn:
0114 C2E7 588 NoEvent: CLR ACC.B_RDY ; Clear RDY bit
0116 C6 589 XCH A,@R0
0117 D2AF 590 SETB EA
591
A51 MACRO ASSEMBLER CONF_TNY 04/26/2009 16:07:33 PAGE 10
0119 5480 592 ANL A,#K_RDY
011B 4207 593 ORL AR7,A
594 IF (TIMESHARING <> 0)
595 IF (CODE_BANKING)
POP ACC
CALL ?B_RESTORE_BANK
ENDIF
011D C200 F 599 CLR ?RTX_TS_DELAY
011F 22 600 RET
601 ELSE
IF (CODE_BANKING)
POP ACC
JMP ?B_RESTORE_BANK
ENDIF
RET
ENDIF
608
609
610
611 ;------------------------------------------------
612 IF (TIMESHARING <> 0)
0120 F6 613 RobinOn: MOV @R0,A
0121 D2AF 614 SETB EA
615 IF (CODE_BANKING)
POP ACC
CALL ?B_RESTORE_BANK
ENDIF
0123 D007 619 POP AR7
0125 D006 620 POP AR6
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