youyuanlvbo.mdl
来自「一个MATLAB的有源滤波的电子仿真图」· MDL 代码 · 共 2,121 行 · 第 1/5 页
MDL
2,121 行
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Add6"
Ports [2, 1]
Position [810, 408, 830, 432]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Add7"
Ports [2, 1]
Position [810, 488, 830, 512]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Add8"
Ports [2, 1]
Position [810, 448, 830, 472]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Constant
Name "Constant"
Position [915, 611, 935, 629]
Value "0"
VectorParams1D on
SamplingMode "Sample based"
OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "sfix(16)"
ConRadixGroup "Use specified scaling"
OutScaling "2^0"
SampleTime "inf"
FramePeriod "inf"
}
Block {
BlockType Reference
Name "Current Measurement"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [250, 278, 275, 302]
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "Current Measurement1"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [250, 323, 275, 347]
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "Current Measurement2"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [250, 368, 275, 392]
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "Current Measurement3"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [495, 283, 520, 307]
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "Current Measurement4"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [495, 328, 520, 352]
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "Current Measurement5"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [495, 373, 520, 397]
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "Current Measurement6"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [915, 123, 940, 147]
Orientation "left"
NamePlacement "alternate"
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "Current Measurement7"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [920, 168, 945, 192]
Orientation "left"
NamePlacement "alternate"
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Reference
Name "Current Measurement8"
Ports [0, 1, 0, 0, 0, 1, 1]
Position [925, 213, 950, 237]
Orientation "left"
NamePlacement "alternate"
SourceBlock "powerlib/Measurements/Current Measurement"
SourceType "Current Measurement"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
PhasorSimulation off
OutputType "Complex"
PSBequivalent "0"
}
Block {
BlockType Demux
Name "Demux"
Ports [1, 3]
Position [785, 543, 790, 607]
BackgroundColor "black"
ShowName off
Outputs "3"
DisplayOption "bar"
}
Block {
BlockType Demux
Name "Demux1"
Ports [1, 3]
Position [1140, 523, 1145, 587]
BackgroundColor "black"
ShowName off
Outputs "3"
DisplayOption "bar"
}
Block {
BlockType Reference
Name "Discrete\nPI Controller"
Ports [1, 1]
Position [1515, 509, 1540, 531]
NamePlacement "alternate"
SourceBlock "powerlib_extras/Discrete \nControl Blocks/Discr"
"ete\nPI Controller"
SourceType "Discrete PI Controller"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
Kp "1.5"
Ki "0.35"
Par_Limits "[1e6 -1e6]"
Init "0"
Ts "50e-6"
}
Block {
BlockType Reference
Name "Discrete\nPI Controller1"
Ports [1, 1]
Position [1570, 527, 1595, 553]
NamePlacement "alternate"
SourceBlock "powerlib_extras/Discrete \nControl Blocks/Discr"
"ete\nPI Controller"
SourceType "Discrete PI Controller"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
Kp "1.5"
Ki "0.35"
Par_Limits "[1e6 -1e6]"
Init "0"
Ts "50e-6"
}
Block {
BlockType Reference
Name "Discrete\nPI Controller2"
Ports [1, 1]
Position [1615, 548, 1640, 572]
SourceBlock "powerlib_extras/Discrete \nControl Blocks/Discr"
"ete\nPI Controller"
SourceType "Discrete PI Controller"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
Kp "1.5"
Ki "0.35"
Par_Limits "[1e6 -1e6]"
Init "0"
Ts "50e-6"
}
Block {
BlockType Reference
Name "Discrete \nButterworth Filter"
Ports [1, 1]
Position [870, 520, 900, 540]
ForegroundColor "gray"
SourceBlock "powerlib_extras/Discrete \nControl Blocks/Discr"
"ete \nButterworth Filter\n"
SourceType "Discrete Butterworth Filter"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
FilterType "Lowpass"
N "2"
Fo "25"
Bo "80"
Ts "50e-6"
Initialize off
Vac_Init "[1.2 60 50]"
Vdc_Init "-0.6"
PlotResponse off
param1 "[1 500 0.1]"
}
Block {
BlockType Reference
Name "Discrete \nButterworth Filter1"
Ports [1, 1]
Position [875, 565, 905, 585]
ForegroundColor "gray"
SourceBlock "powerlib_extras/Discrete \nControl Blocks/Discr"
"ete \nButterworth Filter\n"
SourceType "Discrete Butterworth Filter"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
FilterType "Lowpass"
N "2"
Fo "25"
Bo "80"
Ts "50e-6"
Initialize off
Vac_Init "[1.2 60 50]"
Vdc_Init "-0.6"
PlotResponse off
param1 "[1 500 0.1]"
}
Block {
BlockType Reference
Name "Ground"
Ports [0, 0, 0, 0, 0, 1]
Position [34, 380, 56, 405]
Orientation "down"
ShowName off
SourceBlock "powerlib/Elements/Ground"
SourceType "Ground"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
}
Block {
BlockType Mux
Name "Mux"
Ports [3, 1]
Position [970, 527, 975, 583]
ShowName off
Inputs "3"
DisplayOption "bar"
}
Block {
BlockType Mux
Name "Mux2"
Ports [3, 1]
Position [605, 516, 610, 574]
ShowName off
Inputs "3"
DisplayOption "bar"
}
Block {
BlockType Mux
Name "Mux3"
Ports [2, 1]
Position [640, 652, 645, 708]
ShowName off
Inputs "2"
DisplayOption "bar"
}
Block {
BlockType Saturate
Name "Saturation"
Position [1605, 385, 1625, 405]
Orientation "up"
UpperLimit "1"
LowerLimit "-1"
}
Block {
BlockType Saturate
Name "Saturation1"
Position [1630, 420, 1650, 440]
Orientation "up"
UpperLimit "1"
LowerLimit "-1"
}
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