📄 stm32f103-s.h
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union GPIO_CRH_REG crh ; // 端口配置高寄存器 (GPIOx_CRH) (x=A..E)
union GPIO_IDR_REG idr ; // 端口输入数据寄存器 (GPIOx_IDR) (x=A..E)
union GPIO_ODR_REG odr ; // 端口输出数据寄存器 (GPIOx_ODR) (x=A..E)
union GPIO_BSRR_REG bsrr ; // 端口位设置/复位寄存器 (GPIOx_BSRR)(x=A..E)
union GPIO_BRR_REG brr ; // 端口位复位寄存器 (GPIOx_BRR) (x=A..E)
union GPIO_LCKR_REG lckr ; // 端口配置锁定寄存器 (GPIOx_LCKR)(x=A..E)
};
// *******************************************************************************************************
// 复用功能I/O和调试配置(AFIO) REMAP 映射
// *******************************************************************************************************
struct AFIO_EVCR_BITS {
Uint32 Reserved0 :24;// 31:8
Uint32 EVOE :1; // 7 EVOE：允许事件输出 Cortex的EVENTOUT将连接到由PORT[2:0]和PIN[3:0]选定的I/O口。
Uint32 PORT :3; // 6:4 PORT[2:0]：端口选择 选择用于输出Cortex的EVENTOUT信号的端口：
Uint32 PIN :4; // 3:0 PIN[3:0]：管脚选择
};
union AFIO_EVCR_REG {
Uint32 all;
struct AFIO_EVCR_BITS bit;
};
//---------------------------------------------------
// 复用重映射和调试I/O配置寄存器(AFIO_MAPR)
//----------------------------------------------------
struct AFIO_MAPR_BITS {
Uint32 SPI1_REMAP :1; // 0
Uint32 I2C1_REMAP :1; // 1
Uint32 USART1_REMAP :1; // 2
Uint32 USART2_REMAP :1; // 3
Uint32 USART3_REMAP :2; // 5:4
Uint32 TIM1_REMAP :2; // 7:6
Uint32 TIM2_REMAP :2; // 9:8
Uint32 TIM3_REMAP :2; // 11:10
Uint32 TIM4_REMAP :1; // 12
Uint32 CAN_REMAP :2; // 14:13
Uint32 PD01_REMAP :1; // 15
Uint32 Reserved1 :8; // 23:16
Uint32 SWJ_CFG :3; // 26:24
Uint32 Reserved0 :5; // 31:27
};
union AFIO_MAPR_REG {
Uint32 all;
struct AFIO_MAPR_BITS bit;
};
//--------------------------------------------------------------------
// 5.4.3 外部中断配置寄存器1(AFIO_EXTICR1)
//--------------------------------------------------------------------
struct AFIO_EXTICR_BITS {
Uint32 EXTI0 :4; // 3:0
Uint32 EXTI1 :4; // 7:4
Uint32 EXTI2 :4; // 11:8
Uint32 EXTI3 :4; // 15:12
Uint32 Reserved0 :16;// 31:16
};
union AFIO_EXTICR_REG {
Uint32 all;
struct AFIO_EXTICR_BITS bit;
};
//-----------------------------------------------
struct AFIO_EXTICR0_BITS {
Uint32 EXTI0 :4; // 3:0 0000：PA0 EXTI0 脚 0001：PB0=EXTI0脚 如此类推。。
Uint32 EXTI1 :4; // 7:4
Uint32 EXTI2 :4; // 11:8
Uint32 EXTI3 :4; // 15:12 0000：PA0 EXTI3 脚 0001：PB0=EXTI3脚 如此类推。。
Uint32 Reserved0 :16;// 31:16
};
union AFIO_EXTICR0_REG {
Uint32 all;
struct AFIO_EXTICR0_BITS bit;
};
struct AFIO_EXTICR1_BITS {
Uint32 EXTI4 :4; // 3:0 0000：PA0 EXTI4 脚 0001：PB0=EXTI4脚 如此类推。。
Uint32 EXTI5 :4; // 7:4
Uint32 EXTI6 :4; // 11:8
Uint32 EXTI7 :4; // 15:12 0000：PA0 EXTI7 脚 0001：PB0=EXTI7脚 如此类推。。
Uint32 Reserved0 :16;// 31:16
};
union AFIO_EXTICR1_REG {
Uint32 all;
struct AFIO_EXTICR1_BITS bit;
};
struct AFIO_EXTICR2_BITS {
Uint32 EXTI8 :4; // 3:0
Uint32 EXTI9 :4; // 7:4
Uint32 EXTI10 :4; // 11:8
Uint32 EXTI11 :4; // 15:12
Uint32 Reserved0 :16;// 31:16
};
union AFIO_EXTICR2_REG {
Uint32 all;
struct AFIO_EXTICR2_BITS bit;
};
struct AFIO_EXTICR3_BITS {
Uint32 EXTI12 :4; // 3:0
Uint32 EXTI13 :4; // 7:4
Uint32 EXTI14 :4; // 11:8
Uint32 EXTI15 :4; // 15:12
Uint32 Reserved0 :16;// 31:16
};
union AFIO_EXTICR3_REG {
Uint32 all;
struct AFIO_EXTICR3_BITS bit;
};
struct AFIO_REGS {
union AFIO_EVCR_REG evcr ; // 事件控制寄存器 (AFIO_EVCR)
union AFIO_MAPR_REG mapr ; // 复用重映射和调试I/O配置寄存器 (AFIO_MAPR)
union AFIO_EXTICR0_REG exticr0 ; // 外部中断配置寄存器0 (EXTI0-EXTI3)
union AFIO_EXTICR1_REG exticr1 ; // 外部中断配置寄存器1 (EXTI4-EXTI7)
union AFIO_EXTICR2_REG exticr2 ; // 外部中断配置寄存器2 (EXTI8-EXTI11)
union AFIO_EXTICR3_REG exticr3 ; // 外部中断配置寄存器3 (EXTI12-EXTI15)
};
// *******************************************************************************************************
// 6 中断和事件
// *******************************************************************************************************
struct EXTI_IMR_BITS {
Uint32 MR0 :1; // 0
Uint32 MR1 :1; // 1
Uint32 MR2 :1; // 2
Uint32 MR3 :1; // 3 EXTI_Line3
Uint32 MR4 :1; // 4
Uint32 MR5 :1; // 5
Uint32 MR6 :1; // 6
Uint32 MR7 :1; // 7
Uint32 MR8 :1; // 8
Uint32 MR9 :1; // 9
Uint32 MR10 :1; // 10
Uint32 MR11 :1; // 11
Uint32 MR12 :1; // 12
Uint32 MR13 :1; // 13
Uint32 MR14 :1; // 14
Uint32 MR15 :1; // 15
Uint32 MR16 :1; // 16
Uint32 MR17 :1; // 17
Uint32 MR18 :1; // 18 EXTI_Line18
Uint32 Reserved0 :13;// 31:19
};
union EXTI_IMR_REG {
Uint32 all;
struct EXTI_IMR_BITS bit;
};
//------------------------------------------------------------------------
// 事件屏蔽寄存器（EXTI_EMR）
//------------------------------------------------------------------------
struct EXTI_EMR_BITS {
Uint32 MR0 :1; // 0
Uint32 MR1 :1; // 1
Uint32 MR2 :1; // 2
Uint32 MR3 :1; // 3 EXTI_Line3
Uint32 MR4 :1; // 4
Uint32 MR5 :1; // 5
Uint32 MR6 :1; // 6
Uint32 MR7 :1; // 7
Uint32 MR8 :1; // 8
Uint32 MR9 :1; // 9
Uint32 MR10 :1; // 10
Uint32 MR11 :1; // 11
Uint32 MR12 :1; // 12
Uint32 MR13 :1; // 13
Uint32 MR14 :1; // 14
Uint32 MR15 :1; // 15
Uint32 MR16 :1; // 16
Uint32 MR17 :1; // 17
Uint32 MR18 :1; // 18 EXTI_Line18
Uint32 Reserved0 :13;// 31:19
};
union EXTI_EMR_REG {
Uint32 all;
struct EXTI_EMR_BITS bit;
};
//------------------------------------------------------------------------
// 上升沿触发选择寄存器（EXTI_RTSR）
//------------------------------------------------------------------------
struct EXTI_RTSR_BITS {
Uint32 TR0 :1; // 0
Uint32 TR1 :1; // 1
Uint32 TR2 :1; // 2
Uint32 TR3 :1; // 3 EXTI_Line3
Uint32 TR4 :1; // 4
Uint32 TR5 :1; // 5
Uint32 TR6 :1; // 6
Uint32 TR7 :1; // 7
Uint32 TR8 :1; // 8
Uint32 TR9 :1; // 9
Uint32 TR10 :1; // 10
Uint32 TR11 :1; // 11
Uint32 TR12 :1; // 12
Uint32 TR13 :1; // 13
Uint32 TR14 :1; // 14
Uint32 TR15 :1; // 15
Uint32 TR16 :1; // 16
Uint32 TR17 :1; // 17
Uint32 TR18 :1; // 18 EXTI_Line18
Uint32 Reserved0 :13;// 31:19
};
union EXTI_RTSR_REG {
Uint32 all;
struct EXTI_RTSR_BITS bit;
};
//------------------------------------------------------------------------
// 下降沿触发选择寄存器（EXTI_FTSR）
//------------------------------------------------------------------------
struct EXTI_FTSR_BITS {
Uint32 TR0 :1; // 0
Uint32 TR1 :1; // 1
Uint32 TR2 :1; // 2
Uint32 TR3 :1; // 3 EXTI_Line3
Uint32 TR4 :1; // 4
Uint32 TR5 :1; // 5
Uint32 TR6 :1; // 6
Uint32 TR7 :1; // 7
Uint32 TR8 :1; // 8
Uint32 TR9 :1; // 9
Uint32 TR10 :1; // 10
Uint32 TR11 :1; // 11
Uint32 TR12 :1; // 12
Uint32 TR13 :1; // 13
Uint32 TR14 :1; // 14
Uint32 TR15 :1; // 15
Uint32 TR16 :1; // 16
Uint32 TR17 :1; // 17
Uint32 TR18 :1; // 18 EXTI_Line18
Uint32 Reserved0 :13;// 31:19
};
union EXTI_FTSR_REG {
Uint32 all;
struct EXTI_FTSR_BITS bit;
};
//------------------------------------------------------------------------
// 软件中断事件寄存器（EXTI_SWIER）
//------------------------------------------------------------------------
struct EXTI_SWIER_BITS {
Uint32 SWIER0 :1; // 0
Uint32 SWIER1 :1; // 1
Uint32 SWIER2 :1; // 2
Uint32 SWIER3 :1; // 3 EXTI_Line3
Uint32 SWIER4 :1; // 4
Uint32 SWIER5 :1; // 5
Uint32 SWIER6 :1; // 6
Uint32 SWIER7 :1; // 7
Uint32 SWIER8 :1; // 8
Uint32 SWIER9 :1; // 9
Uint32 SWIER10 :1; // 10
Uint32 SWIER11 :1; // 11
Uint32 SWIER12 :1; // 12
Uint32 SWIER13 :1; // 13
Uint32 SWIER14 :1; // 14
Uint32 SWIER15 :1; // 15
Uint32 SWIER16 :1; // 16
Uint32 SWIER17 :1; // 17
Uint32 SWIER18 :1; // 18 EXTI_Line18
Uint32 Reserved0 :13; // 31:19
};
union EXTI_SWIER_REG {
Uint32 all;
struct EXTI_SWIER_BITS bit;
};
//------------------------------------------------------------------------
// 挂起寄存器（EXTI_PR）
//------------------------------------------------------------------------
struct EXTI_PR_BITS {
Uint32 PR0 :1; // 0 exint0
Uint32 PR1 :1; // 1
Uint32 PR2 :1; // 2
Uint32 PR3 :1; // 3 EXTI_Line3
Uint32 PR4 :1; // 4
Uint32 PR5 :1; // 5
Uint32 PR6 :1; // 6
Uint32 PR7 :1; // 7
Uint32 PR8 :1; // 8
Uint32 PR9 :1; // 9
Uint32 PR10 :1; // 10
Uint32 PR11 :1; // 11
Uint32 PR12 :1; // 12
Uint32 PR13 :1; // 13
Uint32 PR14 :1; // 14
Uint32 PR15 :1; // 15
Uint32 PR16 :1; // 16
Uint32 PR17 :1; // 17
Uint32 PR18 :1; // 18 EXTI_Line18
Uint32 Reserved0 :13;// 31:19
};
union EXTI_PR_REG {
Uint32 all;
struct EXTI_PR_BITS bit;
};
struct EXTI_REGS {
union EXTI_IMR_REG imr ; // 中断屏蔽寄存器（EXTI_IMR）
union EXTI_EMR_REG emr ; // 事件屏蔽寄存器（EXTI_EMR）
union EXTI_RTSR_REG rtsr ; // 上升沿触发选择寄存器（EXTI_RTSR）
union EXTI_FTSR_REG ftsr ; // 下降沿触发选择寄存器（EXTI_FTSR）
union EXTI_SWIER_REG swier; // 软件中断事件寄存器（EXTI_SWIER）
union EXTI_PR_REG pr ; // 挂起寄存器（EXTI_PR）
};
// *******************************************************************************************************
// 9 备份寄存器(BKP)
// *******************************************************************************************************
// *******************************************************************************************************
// 10 独立看门狗(IWDG)
// *******************************************************************************************************
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