automake.log

来自「总体演示程序DEMO_FPGA.rar」· LOG 代码 · 共 30 行

LOG
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Started process "Synthesize".=========================================================================*                          HDL Compilation                              *=========================================================================Compiling vhdl file "E:/DEMO_FPGA/df.vhd" in Library work.Entity <dianziqin> compiled.Entity <dianziqin> (Architecture <behav>) compiled.=========================================================================*                            HDL Analysis                               *=========================================================================Analyzing Entity <dianziqin> (Architecture <behav>).ERROR:Xst:827 - "E:/DEMO_FPGA/df.vhd" line 49: Signal ledoutduan cannot be synthesized, bad synchronous description.--> Total memory usage is 76796 kilobytesNumber of errors   :    1 (   0 filtered)Number of warnings :    0 (   0 filtered)Number of infos    :    0 (   0 filtered)ERROR: XST failedProcess "Synthesize" did not complete.

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