📄 demo_all.mrp
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Unused block "u4/u7/Mmult__n0030_inst_lut2_28_rt" (ROM) removed.The signal "u4/u7/Mmult__n0030_inst_lut2_8_rt" is unused and has been removed. Unused block "u4/u7/Mmult__n0030_inst_lut2_8_rt" (ROM) removed.The signal "u4/u7/datain_0_rt1" is unused and has been removed. Unused block "u4/u7/datain_0_rt1" (ROM) removed.Optimized Block(s):TYPE BLOCKGND XST_GNDVCC XST_VCCGND u4/u0/U0/GNDVCC u4/u0/U0/VCCMUXCY u4/u7/Mmult__n0030_inst_cy_24MUXCY u4/u7/Mmult__n0030_inst_cy_51MUXCY u4/u7/Mmult__n0030_inst_cy_60MUXCY u4/u7/Mmult__n0030_inst_cy_78To enable printing of redundant blocks removed and signals merged, set the
detailed map report option and rerun map.Section 6 - IOB Properties--------------------------+------------------------------------------------------------------------------------------------------------------------+| IOB Name | Type | Direction | IO Standard | Drive | Slew | Reg (s) | Resistor | IOB || | | | | Strength | Rate | | | Delay |+------------------------------------------------------------------------------------------------------------------------+| clk | GCLKIOB | INPUT | LVTTL | | | | | || button<0> | IOB | INPUT | LVTTL | | | INLATCH | | IFD || button<1> | IOB | INPUT | LVTTL | | | INLATCH | | IFD || button<2> | IOB | INPUT | LVTTL | | | INLATCH | | IFD || button<3> | IOB | INPUT | LVTTL | | | INLATCH | | IFD || button<4> | IOB | INPUT | LVTTL | | | INLATCH | | IFD || button<5> | IOB | INPUT | LVTTL | | | INLATCH | | IFD || button<6> | IOB | INPUT | LVTTL | | | INLATCH | | IFD || button<7> | IOB | INPUT | LVTTL | | | INLATCH | | IFD || clk_tlc549 | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTFF | | || cs<0> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || cs<1> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || cs_tlc549 | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || din_adc | IOB | INPUT | LVTTL | | | INFF | | IFD || dout_lcd<0> | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || dout_lcd<1> | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || dout_lcd<2> | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || dout_lcd<3> | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || dout_lcd<4> | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || dout_lcd<5> | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || dout_lcd<6> | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || dout_lcd<7> | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || ichose | IOB | INPUT | LVTTL | | | | | || itclk | IOB | INPUT | LVTTL | | | | | || lcdda | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || lcden | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || lcdrw | IOB | OUTPUT | LVTTL | 12 | SLOW | | | || led<0> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led<1> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led<2> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led<3> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led<4> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led<5> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led<6> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led<7> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led_shift<0> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led_shift<1> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led_shift<2> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || led_shift<3> | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | || mode<0> | IOB | INPUT | LVTTL | | | | | || mode<1> | IOB | INPUT | LVTTL | | | | | || mode<2> | IOB | INPUT | LVTTL | | | | | || mode<3> | IOB | INPUT | LVTTL | | | | | || mode<4> | IOB | INPUT | LVTTL | | | | | || mode<5> | IOB | INPUT | LVTTL | | | | | || otclk | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTFF | | || tone | IOB | OUTPUT | LVTTL | 12 | SLOW | OUTLATCH | | |+------------------------------------------------------------------------------------------------------------------------+Section 7 - RPMs----------------Section 8 - Guide Report------------------------Guide not run on this design.Section 9 - Area Group Summary------------------------------No area groups were found in this design.Section 10 - Modular Design Summary-----------------------------------Modular Design not used for this design.Section 11 - Timing Report--------------------------This design was not run using timing mode.Section 12 - Configuration String Details--------------------------Use the "-detail" map option to print out Configuration StringsSection 13 - Additional Device Resource Counts----------------------------------------------Number of JTAG Gates for IOBs = 47Number of Equivalent Gates for Design = 66,571Number of RPM Macros = 0Number of Hard Macros = 0PCI IOBs = 0PCI LOGICs = 0CAPTUREs = 0BSCANs = 0STARTUPs = 0DLLs = 0GCLKIOBs = 1GCLKs = 4Block RAMs = 3TBUFs = 0Total Registers (Flops & Latches in Slices & IOBs) not driven by LUTs = 371IOB Latches not driven by LUTs = 8IOB Latches = 23IOB Flip Flops not driven by LUTs = 3IOB Flip Flops = 3Unbonded IOBs = 0Bonded IOBs = 46XORs = 571CARRY_INITs = 433CARRY_SKIPs = 0CARRY_MUXes = 781Shift Registers = 0Static Shift Registers = 0Dynamic Shift Registers = 016x1 ROMs = 016x1 RAMs = 032x1 RAMs = 0Dual Port RAMs = 0MULT_ANDs = 0MUXF5s + MUXF6s = 664 input LUTs used as Route-Thrus = 5434 input LUTs = 1238Slice Latches not driven by LUTs = 8Slice Latches = 54Slice Flip Flops not driven by LUTs = 352Slice Flip Flops = 666Slices = 1032F6 Muxes = 8F5 Muxes = 58Xilinx Core blkmemsp_v6_1, Coregen 7.1.01i = 1Number of LUT signals with 4 loads = 31Number of LUT signals with 3 loads = 16Number of LUT signals with 2 loads = 139Number of LUT signals with 1 load = 985NGM Average fanout of LUT = 1.77NGM Maximum fanout of LUT = 32NGM Average fanin for LUT = 3.1357Number of LUT symbols = 1238
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