_cg_exc.out

总体演示程序DEMO_FPGA.rar

SET_ERROR_CODE 0
SET_ERROR_MSG null
SET_ERROR_TEXT Generating
SET_PARAMETER primitive_selection Select_Primitive
SET_PARAMETER init_value 0
SET_PARAMETER register_inputs false
SET_PARAMETER write_enable_polarity Active_High
SET_PARAMETER init_pin false
SET_PARAMETER initialization_pin_polarity Active_High
SET_PARAMETER global_init_value 0
SET_PARAMETER select_primitive 512x8
SET_PARAMETER enable_pin false
SET_PARAMETER write_mode Read_After_Write
SET_PARAMETER port_configuration Read_Only
SET_PARAMETER component_name mem_infor
SET_PARAMETER active_clock_edge Rising_Edge_Triggered
SET_PARAMETER disable_warning_messages true
SET_PARAMETER handshaking_pins false
SET_PARAMETER width 8
SET_PARAMETER load_init_file false
SET_PARAMETER enable_pin_polarity Active_High
SET_PARAMETER additional_output_pipe_stages 0
SET_PARAMETER has_limit_data_pitch false
SET_PARAMETER limit_data_pitch 8
SET_PARAMETER depth 1024