entity.h

总体演示程序DEMO_FPGA.rar

////////////////////////////////////////////////////////////////////////////////
//   ____  ____   
//  /   /\/   /  
// /___/  \  /   
// \   \   \/  
//  \   \        Copyright (c) 2003-2004 Xilinx, Inc.
//  /   /        All Right Reserved. 
// /___/   /      
// \   \  /  \  
//  \___\/\___\
////////////////////////////////////////////////////////////////////////////////

#ifndef H_Simprim_x_lut4_H
#define H_Simprim_x_lut4_H

#ifdef __MINGW32__
#include "xsimMinGW.h"
#else
#include "xsim.h"
#endif



class Simprim_x_lut4: public HSim__s6 {

public:
HSim__s4 Dd;
HSim__s4 Df;
  char *t154;
HSim__s4 Dm;
HSim__s4 Du;
HSim__s4 DB;
HSim__s4 DI;
HSim__s4 DQ;
HSim__s4 DX;
HSim__s4 D14;
HSim__s4 D1b;
HSim__s4 D1h;
    HSim__s1 SE[5];
    Simprim_x_lut4(const char *name, const char* ArchName, const char *fileName,     const char * vXon=0,     const char * vMsgon=0,     const char * vTipd_adr0=0,     const char * vTipd_adr1=0,     const char * vTipd_adr2=0,     const char * vTipd_adr3=0,     const char * vTpd_adr0_o=0,     const char * vTpd_adr1_o=0,     const char * vTpd_adr2_o=0,     const char * vTpd_adr3_o=0,     const char * vInit=0, HSimConstraints * constrInit=0, int numOfLine = 0);
    ~Simprim_x_lut4();
    void SetPorts();
    void constructEntityObject();

    class gDm : public HSimGenValCtor
    {
    public: 
        gDm();
    };

    class gDu : public HSimGenValCtor
    {
    public: 
        gDu();
    };

    class gDB : public HSimGenValCtor
    {
    public: 
        gDB();
    };

    class gDI : public HSimGenValCtor
    {
    public: 
        gDI();
    };

    class gDQ : public HSimGenValCtor
    {
    public: 
        gDQ();
    };

    class gDX : public HSimGenValCtor
    {
    public: 
        gDX();
    };

    class gD14 : public HSimGenValCtor
    {
    public: 
        gD14();
    };

    class gD1b : public HSimGenValCtor
    {
    public: 
        gD1b();
    };

};

#endif