top_fpga_demo.bld

总体演示程序DEMO_FPGA.rar

Release 7.1.01i ngdbuild H.39
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

Command Line: ngdbuild -intstyle ise -dd e:\demo_fpga/_ngo -nt timestamp -uc
top_fpga.ucf -p xc2s100e-pq208-6 top_fpga_demo.ngc top_fpga_demo.ngd 

Reading NGO file 'E:/DEMO_FPGA/top_fpga_demo.ngc' ...
Executing edif2ngd -noa "mem_infor.edn" "e:\demo_fpga\_ngo\mem_infor.ngo"
Release 7.1.01i - edif2ngd H.39
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.
INFO:NgdBuild - Release 7.1.01i edif2ngd H.39
INFO:NgdBuild - Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.
Writing module to "e:/demo_fpga/_ngo/mem_infor.ngo"...
Loading design module "e:\demo_fpga\_ngo\mem_infor.ngo"...

Applying constraints in "top_fpga.ucf" to the design...

Checking timing specifications ...
Checking expanded design ...

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 65524 kilobytes

Writing NGD file "top_fpga_demo.ngd" ...

Writing NGDBUILD log file "top_fpga_demo.bld"...