h_sync.v
来自「something is very important in life. So 」· Verilog 代码 · 共 354 行 · 第 1/2 页
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354 行
h_p_cnt_clr = 1;
h_bp_cnt_ce = 1;
h_bp_cnt_clr = 0;
h_pix_cnt_ce = 0;
h_pix_cnt_clr = 1;
h_fp_cnt_ce = 0;
h_fp_cnt_clr = 1;
HSYNC = 1;
H_DE = 0;
if (h_bp_cnt_tc == 0) HSYNC_ns = BACK_PORCH;
else HSYNC_ns = PIXEL;
end
/////////////////////////////////////////////////////////////////////////
// PIXEL STATE
// -- Enable pixel counter
// -- De-enable others
/////////////////////////////////////////////////////////////////////////
PIXEL: begin
h_p_cnt_ce = 0;
h_p_cnt_clr = 1;
h_bp_cnt_ce = 0;
h_bp_cnt_clr = 1;
h_pix_cnt_ce = 1;
h_pix_cnt_clr = 0;
h_fp_cnt_ce = 0;
h_fp_cnt_clr = 1;
HSYNC = 1;
H_DE = 1;
if (h_pix_cnt_tc == 0) HSYNC_ns = PIXEL;
else HSYNC_ns = FRONT_PORCH;
end
/////////////////////////////////////////////////////////////////////////
// FRONT PORCH STATE
// -- Enable front porch counter
// -- De-enable others
// -- Wraps to PULSE state
/////////////////////////////////////////////////////////////////////////
FRONT_PORCH: begin
h_p_cnt_ce = 0;
h_p_cnt_clr = 1;
h_bp_cnt_ce = 0;
h_bp_cnt_clr = 1;
h_pix_cnt_ce = 0;
h_pix_cnt_clr = 1;
h_fp_cnt_ce = 1;
h_fp_cnt_clr = 0;
HSYNC = 1;
H_DE = 0;
if (h_fp_cnt_tc == 0) HSYNC_ns = FRONT_PORCH;
else HSYNC_ns = PULSE;
end
/////////////////////////////////////////////////////////////////////////
// DEFAULT STATE
/////////////////////////////////////////////////////////////////////////
default: begin
h_p_cnt_ce = 0;
h_p_cnt_clr = 1;
h_bp_cnt_ce = 0;
h_bp_cnt_clr = 1;
h_pix_cnt_ce = 0;
h_pix_cnt_clr = 1;
h_fp_cnt_ce = 1;
h_fp_cnt_clr = 0;
HSYNC = 1;
H_DE = 0;
HSYNC_ns = SET_COUNTERS;
end
endcase
end
///////////////////////////////////////////////////////////////////////////////
// Horizontal Pulse Counter - Counts 96 clocks for pulse time
///////////////////////////////////////////////////////////////////////////////
always @(posedge clk)
begin
if (h_p_cnt_clr) begin
h_p_cnt = 7'b0;
h_p_cnt_tc = 0;
end
else begin
if (h_p_cnt_ce) begin
if (h_p_cnt == 94) begin
h_p_cnt = h_p_cnt + 1;
h_p_cnt_tc = 1;
end
else begin
h_p_cnt = h_p_cnt + 1;
h_p_cnt_tc = 0;
end
end
end
end
///////////////////////////////////////////////////////////////////////////////
// Horizontal Back Porch Counter - Counts 48 clocks for back porch time
///////////////////////////////////////////////////////////////////////////////
always @(posedge clk )
begin
if (h_bp_cnt_clr) begin
h_bp_cnt = 6'b0;
h_bp_cnt_tc = 0;
h_bp_cnt_tc2 = 0;
end
else begin
if (h_bp_cnt_ce) begin
if (h_bp_cnt == 45) begin
h_bp_cnt = h_bp_cnt + 1;
h_bp_cnt_tc2 = 1;
h_bp_cnt_tc = 0;
end
else if (h_bp_cnt == 46) begin
h_bp_cnt = h_bp_cnt + 1;
h_bp_cnt_tc = 1;
h_bp_cnt_tc2 = 0;
end
else begin
h_bp_cnt = h_bp_cnt + 1;
h_bp_cnt_tc = 0;
h_bp_cnt_tc2 = 0;
end
end
end
end
///////////////////////////////////////////////////////////////////////////////
// Horizontal Pixel Counter - Counts 640 clocks for pixel time
///////////////////////////////////////////////////////////////////////////////
always @(posedge clk)
begin
if (h_pix_cnt_clr) begin
h_pix_cnt = 11'b0;
h_pix_cnt_tc = 0;
h_pix_cnt_tc2 = 0;
end
else begin
if (h_pix_cnt_ce) begin
if (h_pix_cnt == 637) begin
h_pix_cnt = h_pix_cnt + 1;
h_pix_cnt_tc2 = 1;
end
else if (h_pix_cnt == 638) begin
h_pix_cnt = h_pix_cnt + 1;
h_pix_cnt_tc = 1;
end
else begin
h_pix_cnt = h_pix_cnt + 1;
h_pix_cnt_tc = 0;
h_pix_cnt_tc2 = 0;
end
end
end
end
///////////////////////////////////////////////////////////////////////////////
// Horizontal Front Porch Counter - Counts 16 clocks for front porch time
///////////////////////////////////////////////////////////////////////////////
always @(posedge clk)
begin
if (h_fp_cnt_clr) begin
h_fp_cnt = 5'b0;
h_fp_cnt_tc = 0;
end
else begin
if (h_fp_cnt_ce) begin
if (h_fp_cnt == 14) begin
h_fp_cnt = h_fp_cnt + 1;
h_fp_cnt_tc = 1;
end
else begin
h_fp_cnt = h_fp_cnt + 1;
h_fp_cnt_tc = 0;
end
end
end
end
endmodule
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