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📄 mod51

📁 FFT asm version.A zip file of all the files is provided in FFT.ZIP
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字号:
;      REV.  1.0    MAY 23, 1984
P0     DATA  080H  ;PORT 0
SP     DATA  081H  ;STACK POINTER
DPL    DATA  082H  ;DATA POINTER - LOW BYTE
DPH    DATA  083H  ;DATA POINTER - HIGH BYTE
PCON   DATA  087H  ;POWER CONTROL
TCON   DATA  088H  ;TIMER CONTROL
TMOD   DATA  089H  ;TIMER MODE
TL0    DATA  08AH  ;TIMER 0 - LOW BYTE
TL1    DATA  08BH  ;TIMER 1 - LOW BYTE
TH0    DATA  08CH  ;TIMER 0 - HIGH BYTE
TH1    DATA  08DH  ;TIMER 1 - HIGH BYTE
P1     DATA  090H  ;PORT 1
SCON   DATA  098H  ;SERIAL PORT CONTROL
SBUF   DATA  099H  ;SERIAL PORT BUFFER
P2     DATA  0A0H  ;PORT 2
IE     DATA  0A8H  ;INTERRUPT ENABLE
P3     DATA  0B0H  ;PORT 3
IP     DATA  0B8H  ;INTERRUPT PRIORITY
PSW    DATA  0D0H  ;PROGRAM STATUS WORD
ACC    DATA  0E0H  ;ACCUMULATOR
B      DATA  0F0H  ;MULTIPLICATION REGISTER
IT0    BIT   088H  ;TCON.0 - EXT. INTERRUPT 0 TYPE
IE0    BIT   089H  ;TCON.1 - EXT. INTERRUPT 0 EDGE FLAG
IT1    BIT   08AH  ;TCON.2 - EXT. INTERRUPT 1 TYPE
IE1    BIT   08BH  ;TCON.3 - EXT. INTERRUPT 1 EDGE FLAG
TR0    BIT   08CH  ;TCON.4 - TIMER 0 ON/OFF CONTROL
TF0    BIT   08DH  ;TCON.5 - TIMER 0 OVERFLOW FLAG
TR1    BIT   08EH  ;TCON.6 - TIMER 1 ON/OFF CONTROL
TF1    BIT   08FH  ;TCON.7 - TIMER 1 OVERFLOW FLAG
RI     BIT   098H  ;SCON.0 - RECEIVE INTERRUPT FLAG
TI     BIT   099H  ;SCON.1 - TRANSMIT INTERRUPT FLAG
RB8    BIT   09AH  ;SCON.2 - RECEIVE BIT 8
TB8    BIT   09BH  ;SCON.3 - TRANSMIT BIT 8
REN    BIT   09CH  ;SCON.4 - RECEIVE ENABLE
SM2    BIT   09DH  ;SCON.5 - SERIAL MODE CONTROL BIT 2
SM1    BIT   09EH  ;SCON.6 - SERIAL MODE CONTROL BIT 1
SM0    BIT   09FH  ;SCON.7 - SERIAL MODE CONTROL BIT 0
EX0    BIT   0A8H  ;IE.0 - EXTERNAL INTERRUPT 0 ENABLE
ET0    BIT   0A9H  ;IE.1 - TIMER 0 INTERRUPT ENABLE
EX1    BIT   0AAH  ;IE.2 - EXTERNAL INTERRUPT 1 ENABLE
ET1    BIT   0ABH  ;IE.3 - TIMER 1 INTERRUPT ENABLE
ES     BIT   0ACH  ;IE.4 - SERIAL PORT INTERRUPT ENABLE
EA     BIT   0AFH  ;IE.7 - GLOBAL INTERRUPT ENABLE
RXD    BIT   0B0H  ;P3.0 - SERIAL PORT RECEIVE INPUT
TXD    BIT   0B1H  ;P3.1 - SERIAL PORT TRANSMIT OUTPUT
INT0   BIT   0B2H  ;P3.2 - EXTERNAL INTERRUPT 0 INPUT
INT1   BIT   0B3H  ;P3.3 - EXTERNAL INTERRUPT 1 INPUT
T0     BIT   0B4H  ;P3.4 - TIMER 0 COUNT INPUT
T1     BIT   0B5H  ;P3.5 - TIMER 1 COUNT INPUT
WR     BIT   0B6H  ;P3.6 - WRITE CONTROL FOR EXT. MEMORY
RD     BIT   0B7H  ;P3.7 - READ CONTROL FOR EXT. MEMORY
PX0    BIT   0B8H  ;IP.0 - EXTERNAL INTERRUPT 0 PRIORITY
PT0    BIT   0B9H  ;IP.1 - TIMER 0 PRIORITY
PX1    BIT   0BAH  ;IP.2 - EXTERNAL INTERRUPT 1 PRIORITY
PT1    BIT   0BBH  ;IP.3 - TIMER 1 PRIORITY
PS     BIT   0BCH  ;IP.4 - SERIAL PORT PRIORITY
P      BIT   0D0H  ;PSW.0 - ACCUMULATOR PARITY FLAG
OV     BIT   0D2H  ;PSW.2 - OVERFLOW FLAG
RS0    BIT   0D3H  ;PSW.3 - REGISTER BANK SELECT 0
RS1    BIT   0D4H  ;PSW.4 - REGISTER BANK SELECT 1
F0     BIT   0D5H  ;PSW.5 - FLAG 0
AC     BIT   0D6H  ;PSW.6 - AUXILIARY CARRY FLAG
CY     BIT   0D7H  ;PSW.7 - CARRY FLAG

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