📄 s3.mdl
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Model {
Name "s3"
Version 2.00
SimParamPage Solver
SampleTimeColors off
WideVectorLines on
PaperOrientation landscape
StartTime "0.0"
StopTime "0.7"
Solver ode45
RelTol "1e-5"
AbsTol "1e-6"
Refine "1"
MaxStep "1e-2"
InitialStep "auto"
FixedStep "auto"
MaxOrder 5
OutputOption RefineOutputTimes
OutputTimes "[]"
LoadExternalInput off
ExternalInput "[t, u]"
SaveTime off
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput off
OutputSaveName "yout"
LoadInitialState off
InitialState "xInitial"
SaveFinalState off
FinalStateName "xFinal"
LimitMaxRows off
MaxRows "1000"
Decimation "1"
AlgebraicLoopMsg warning
MinStepSizeMsg warning
UnconnectedInputMsg warning
UnconnectedOutputMsg warning
UnconnectedLineMsg warning
ConsistencyChecking off
ZeroCross on
BlockDefaults {
Orientation right
ForegroundColor black
BackgroundColor white
DropShadow off
NamePlacement normal
FontName "Helvetica"
FontSize 10
FontWeight normal
FontAngle normal
ShowName on
}
AnnotationDefaults {
HorizontalAlignment center
VerticalAlignment middle
ForegroundColor black
BackgroundColor white
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight normal
FontAngle normal
}
System {
Name "s3"
Location [4, 57, 795, 390]
Open on
ScreenColor white
Block {
BlockType SubSystem
Name "Cap"
Position [560, 183, 600, 272]
ShowPortLabels off
System {
Name "Cap"
Location [145, 152, 806, 492]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_iqa2b"
Position [15, 125, 35, 145]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_ida2b"
Position [50, 175, 70, 195]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Fcn
Name "Fcn"
Position [190, 88, 470, 122]
Expr "-wb*xc(1)*u[2] - wb*u[4] "
}
Block {
BlockType Fcn
Name "Fcn1"
Position [190, 188, 470, 222]
Expr "-wb*xc(1)*u[3] + wb*u[1] "
}
Block {
BlockType Mux
Name "Mux"
Position [110, 60, 130, 260]
Inputs "4"
}
Block {
BlockType Integrator
Name "vd"
Position [500, 192, 525, 218]
ExternalReset none
InitialConditionSource internal
InitialCondition "VdCs"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "vq"
Position [500, 92, 525, 118]
ExternalReset none
InitialConditionSource internal
InitialCondition "VqCs"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Outport
Name "out_vqa2b"
Position [595, 95, 615, 115]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "out_vda2b"
Position [595, 195, 615, 215]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "vd"
SrcPort 1
Points [0, 0]
Branch {
Points [30, 0; 0, 80; -470, 0; 0, -50]
DstBlock "Mux"
DstPort 4
}
Branch {
DstBlock "out_vda2b"
DstPort 1
}
}
Line {
SrcBlock "in_ida2b"
SrcPort 1
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "in_iqa2b"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "vq"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "out_vqa2b"
DstPort 1
}
Branch {
Points [35, 0; 0, -65; -475, 0; 0, 45]
DstBlock "Mux"
DstPort 1
}
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [0, 0]
Branch {
Points [25, 0; 0, -55]
DstBlock "Fcn"
DstPort 1
}
Branch {
Points [25, 0; 0, 45]
DstBlock "Fcn1"
DstPort 1
}
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "vq"
DstPort 1
}
Line {
SrcBlock "Fcn1"
SrcPort 1
DstBlock "vd"
DstPort 1
}
}
}
Block {
BlockType Constant
Name "Ef"
Position [50, 154, 90, 176]
Value "Efo"
}
Block {
BlockType SubSystem
Name "m3"
Position [631, 52, 704, 89]
DropShadow on
OpenFcn "m3"
ShowPortLabels off
MaskType "Masked block of m3.m"
MaskHelp "Uses m3.m to initialize and plot"
MaskDisplay "disp('Initialize\\nand plot')"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate off
MaskIconUnits autoscale
System {
Name "m3"
Location [600, 32767, 792, 32767]
Open off
ScreenColor white
Annotation {
Position [132, 67]
VerticalAlignment top
Text "Masked block of m3.m to initalize\ns3.m "
"in Chapter 10 and plot results "
}
}
}
Block {
BlockType SubSystem
Name "Plot/Scope"
Position [427, 35, 543, 80]
Orientation up
ShowPortLabels off
System {
Name "Plot/Scope"
Location [4, 145, 735, 510]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_iqe"
Position [70, 100, 90, 120]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_ide"
Position [70, 150, 90, 170]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_vqCs"
Position [70, 195, 90, 215]
Port "3"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_vdCs"
Position [70, 245, 90, 265]
Port "4"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_Tem"
Position [450, 175, 470, 195]
Port "5"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_LPA-LPB"
Position [450, 215, 470, 235]
Port "6"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_Gen-Exc"
Position [450, 255, 470, 275]
Port "7"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Clock
Name "Clock"
Position [70, 55, 90, 75]
DeleteFcn "simclock BlockIsBeingDestroyed"
PostSaveFcn "simclock Save"
Location [30, 40, 140, 75]
}
Block {
BlockType Fcn
Name "Fcn"
Position [205, 135, 430, 165]
Expr "u[2]*cos(wb*u[1]) + u[3]*sin(wb*u[1])"
}
Block {
BlockType Fcn
Name "Fcn1"
Position [205, 90, 430, 120]
Expr "u[4]*cos(wb*u[1]) + u[5]*sin(wb*u[1])"
}
Block {
BlockType Mux
Name "Mux"
Position [555, 44, 585, 286]
Inputs "6"
}
Block {
BlockType Mux
Name "Mux1"
Position [145, 74, 175, 196]
Inputs "5"
}
Block {
BlockType ToWorkspace
Name "Out"
Position [640, 157, 690, 173]
VariableName "yout"
Buffer "20000"
Decimation "1"
SampleTime "0"
}
Block {
BlockType Scope
Name "Scope"
Position [650, 230, 680, 260]
Floating off
Location [0, 347, 812, 498]
Open on
Grid on
TickLabels on
ZoomMode on
TimeRange "0.700000"
YMin "-3.000000"
YMax "3.000000"
SaveToWorkspace off
SaveName "ScopeData"
LimitMaxRows on
MaxRows "5000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Line {
SrcBlock "Fcn1"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "Fcn"
SrcPort 1
Points [50, 0; 0, -5]
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [0, 0]
Branch {
Points [25, 0; 0, 80]
DstBlock "Scope"
DstPort 1
}
Branch {
DstBlock "Out"
DstPort 1
}
}
Line {
SrcBlock "Clock"
SrcPort 1
Points [0, 0]
Branch {
Points [30, 0; 0, 20]
DstBlock "Mux1"
DstPort 1
}
Branch {
DstBlock "Mux"
DstPort 1
}
}
Line {
SrcBlock "in_Gen-Exc"
SrcPort 1
DstBlock "Mux"
DstPort 6
}
Line {
SrcBlock "in_LPA-LPB"
SrcPort 1
DstBlock "Mux"
DstPort 5
}
Line {
SrcBlock "in_vdCs"
SrcPort 1
Points [30, 0; 0, -70]
DstBlock "Mux1"
DstPort 5
}
Line {
SrcBlock "in_vqCs"
SrcPort 1
Points [20, 0; 0, -45]
DstBlock "Mux1"
DstPort 4
}
Line {
SrcBlock "in_ide"
SrcPort 1
Points [10, 0; 0, -25]
DstBlock "Mux1"
DstPort 3
}
Line {
SrcBlock "in_iqe"
SrcPort 1
DstBlock "Mux1"
DstPort 2
}
Line {
SrcBlock "Mux1"
SrcPort 1
Points [0, 0]
Branch {
Points [5, 0; 0, -30]
DstBlock "Fcn1"
DstPort 1
}
Branch {
Points [5, 0; 0, 15]
DstBlock "Fcn"
DstPort 1
}
}
Line {
SrcBlock "in_Tem"
SrcPort 1
DstBlock "Mux"
DstPort 4
}
}
}
Block {
BlockType SubSystem
Name "ShuntCap"
Position [355, 175, 390, 250]
ShowPortLabels off
System {
Name "ShuntCap"
Location [145, 152, 806, 492]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_iqa2b"
Position [15, 125, 35, 145]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_ida2b"
Position [50, 175, 70, 195]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Fcn
Name "Fcn"
Position [190, 88, 470, 122]
Expr "-wb*xc(2)*u[2] - wb*u[4] "
}
Block {
BlockType Fcn
Name "Fcn1"
Position [190, 188, 470, 222]
Expr "-wb*xc(2)*u[3] + wb*u[1] "
}
Block {
BlockType Mux
Name "Mux"
Position [110, 60, 130, 260]
Inputs "4"
}
Block {
BlockType Integrator
Name "vd"
Position [500, 192, 525, 218]
ExternalReset none
InitialConditionSource internal
InitialCondition "Vd1"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
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