s3eig.m

simulink electrical machine(2)

function [ret,x0,str,ts,xts]=s3eig(t,x,u,flag);
%s3eig	is the M-file description of the SIMULINK system named s3eig.
%	The block-diagram can be displayed by typing: s3eig.
%
%	SYS=s3eig(T,X,U,FLAG) returns depending on FLAG certain
%	system values given time point, T, current state vector, X,
%	and input vector, U.
%	FLAG is used to indicate the type of output to be returned in SYS.
%
%	Setting FLAG=1 causes s3eig to return state derivatives, FLAG=2
%	discrete states, FLAG=3 system outputs and FLAG=4 next sample
%	time. For more information and other options see SFUNC.
%
%	Calling s3eig with a FLAG of zero:
%	[SIZES]=s3eig([],[],[],0),  returns a vector, SIZES, which
%	contains the sizes of the state vector and other parameters.
%		SIZES(1) number of states
%		SIZES(2) number of discrete states
%		SIZES(3) number of outputs
%		SIZES(4) number of inputs
%		SIZES(5) number of roots (currently unsupported)
%		SIZES(6) direct feedthrough flag
%		SIZES(7) number of sample times
%
%	For the definition of other parameters in SIZES, see SFUNC.
%	See also, TRIM, LINMOD, LINSIM, EULER, RK23, RK45, ADAMS, GEAR.

% Note: This M-file is only used for saving graphical information;
%       after the model is loaded into memory an internal model
%       representation is used.

% the system will take on the name of this mfile:
sys = mfilename;
new_system(sys)
simver(1.3)
if (0 == (nargin + nargout))
     set_param(sys,'Location',[4,100,795,497])
     open_system(sys)
end;
set_param(sys,'algorithm',     'Adams/Gear')
set_param(sys,'Start time',    '0.0')
set_param(sys,'Stop time',     '99')
set_param(sys,'Min step size', '0.00001')
set_param(sys,'Max step size', '0.0005')
set_param(sys,'Relative error','1e-6')
set_param(sys,'Return vars',   '')

add_block('built-in/Sum',[sys,'/','Sum2'])
set_param([sys,'/','Sum2'],...
		'inputs','-+',...
		'position',[305,216,320,249])

add_block('built-in/Sum',[sys,'/','Sum3'])
set_param([sys,'/','Sum3'],...
		'inputs','+-',...
		'position',[335,251,350,284])

add_block('built-in/Inport',[sys,'/','In_Ef'])
set_param([sys,'/','In_Ef'],...
		'Port','3',...
		'position',[85,195,105,215])

add_block('built-in/Inport',[sys,'/','In_Tmech'])
set_param([sys,'/','In_Tmech'],...
		'Port','4',...
		'position',[85,240,105,260])

add_block('built-in/Outport',[sys,'/','Out_slip'])
set_param([sys,'/','Out_slip'],...
		'Port','4',...
		'position',[295,170,315,190])


%     Subsystem  'seriesRL'.

new_system([sys,'/','seriesRL'])
set_param([sys,'/','seriesRL'],'Location',[191,509,852,849])

add_block('built-in/Mux',[sys,'/','seriesRL/Mux'])
set_param([sys,'/','seriesRL/Mux'],...
		'inputs','6',...
		'position',[110,58,130,257])

add_block('built-in/Inport',[sys,'/','seriesRL/in_vqa'])
set_param([sys,'/','seriesRL/in_vqa'],...
		'position',[15,95,35,115])

add_block('built-in/Inport',[sys,'/','seriesRL/in_vqb'])
set_param([sys,'/','seriesRL/in_vqb'],...
		'Port','3',...
		'position',[15,165,35,185])

add_block('built-in/Inport',[sys,'/','seriesRL/in_vda'])
set_param([sys,'/','seriesRL/in_vda'],...
		'Port','2',...
		'position',[50,130,70,150])

add_block('built-in/Inport',[sys,'/','seriesRL/in_vdb'])
set_param([sys,'/','seriesRL/in_vdb'],...
		'Port','4',...
		'position',[45,200,65,220])

add_block('built-in/Integrator',[sys,'/','seriesRL/iq'])
set_param([sys,'/','seriesRL/iq'],...
		'Initial','Iq',...
		'position',[500,92,525,118])

add_block('built-in/Fcn',[sys,'/','seriesRL/Fcn'])
set_param([sys,'/','seriesRL/Fcn'],...
		'Expr','(wb/xl(1))*(u[2]-u[4] - r(1)*u[1] -xl(1)*u[6])',...
		'position',[190,88,470,122])

add_block('built-in/Outport',[sys,'/','seriesRL/out_iqa2b'])
set_param([sys,'/','seriesRL/out_iqa2b'],...
		'position',[595,95,615,115])

add_block('built-in/Integrator',[sys,'/','seriesRL/id'])
set_param([sys,'/','seriesRL/id'],...
		'Initial','Id',...
		'position',[500,192,525,218])

add_block('built-in/Outport',[sys,'/','seriesRL/out_ida2b'])
set_param([sys,'/','seriesRL/out_ida2b'],...
		'Port','2',...
		'position',[595,195,615,215])

add_block('built-in/Fcn',[sys,'/','seriesRL/Fcn1'])
set_param([sys,'/','seriesRL/Fcn1'],...
		'Expr','(wb/xl(1))*(u[3]-u[5] - r(1)*u[6] + xl(1)*u[1])',...
		'position',[190,188,470,222])
add_line([sys,'/','seriesRL'],[530,205;560,205;560,275;90,275;90,245;105,245])
add_line([sys,'/','seriesRL'],[135,160;160,160;160,205;185,205])
add_line([sys,'/','seriesRL'],[475,205;495,205])
add_line([sys,'/','seriesRL'],[530,105;565,105;565,40;90,40;90,70;105,70])
add_line([sys,'/','seriesRL'],[475,105;495,105])
add_line([sys,'/','seriesRL'],[135,160;160,160;160,105;185,105])
add_line([sys,'/','seriesRL'],[530,105;590,105])
add_line([sys,'/','seriesRL'],[40,105;105,105])
add_line([sys,'/','seriesRL'],[75,140;105,140])
add_line([sys,'/','seriesRL'],[40,175;105,175])
add_line([sys,'/','seriesRL'],[70,210;105,210])
add_line([sys,'/','seriesRL'],[530,205;590,205])


%     Finished composite block 'seriesRL'.

set_param([sys,'/','seriesRL'],...
		'position',[500,221,540,309])


%     Subsystem  'ShuntCap'.

new_system([sys,'/','ShuntCap'])
set_param([sys,'/','ShuntCap'],'Location',[145,152,806,492])

add_block('built-in/Mux',[sys,'/','ShuntCap/Mux'])
set_param([sys,'/','ShuntCap/Mux'],...
		'position',[110,60,130,260])

add_block('built-in/Integrator',[sys,'/','ShuntCap/vq'])
set_param([sys,'/','ShuntCap/vq'],...
		'Initial','Vq1',...
		'position',[500,92,525,118])

add_block('built-in/Fcn',[sys,'/','ShuntCap/Fcn'])
set_param([sys,'/','ShuntCap/Fcn'],...
		'Expr','-wb*xc(2)*u[2] - wb*u[4] ',...
		'position',[190,88,470,122])

add_block('built-in/Outport',[sys,'/','ShuntCap/out_vqa2b'])
set_param([sys,'/','ShuntCap/out_vqa2b'],...
		'position',[595,95,615,115])

add_block('built-in/Integrator',[sys,'/','ShuntCap/vd'])
set_param([sys,'/','ShuntCap/vd'],...
		'Initial','Vd1',...
		'position',[500,192,525,218])

add_block('built-in/Outport',[sys,'/','ShuntCap/out_vda2b'])
set_param([sys,'/','ShuntCap/out_vda2b'],...
		'Port','2',...
		'position',[595,195,615,215])

add_block('built-in/Inport',[sys,'/','ShuntCap/in_iqa2b'])
set_param([sys,'/','ShuntCap/in_iqa2b'],...
		'position',[15,125,35,145])

add_block('built-in/Inport',[sys,'/','ShuntCap/in_ida2b'])
set_param([sys,'/','ShuntCap/in_ida2b'],...
		'Port','2',...
		'position',[50,175,70,195])

add_block('built-in/Fcn',[sys,'/','ShuntCap/Fcn1'])
set_param([sys,'/','ShuntCap/Fcn1'],...
		'Expr','-wb*xc(2)*u[3] + wb*u[1] ',...
		'position',[190,188,470,222])
add_line([sys,'/','ShuntCap'],[135,160;160,160;160,205;185,205])
add_line([sys,'/','ShuntCap'],[475,205;495,205])
add_line([sys,'/','ShuntCap'],[530,105;565,105;565,40;90,40;90,85;105,85])
add_line([sys,'/','ShuntCap'],[475,105;495,105])
add_line([sys,'/','ShuntCap'],[135,160;160,160;160,105;185,105])
add_line([sys,'/','ShuntCap'],[530,105;590,105])
add_line([sys,'/','ShuntCap'],[40,135;105,135])
add_line([sys,'/','ShuntCap'],[75,185;105,185])
add_line([sys,'/','ShuntCap'],[530,205;590,205])
add_line([sys,'/','ShuntCap'],[530,205;560,205;560,285;90,285;90,235;105,235])


%     Finished composite block 'ShuntCap'.

set_param([sys,'/','ShuntCap'],...
		'position',[375,215,410,290])


%     Subsystem  'gen'.

new_system([sys,'/','gen'])
set_param([sys,'/','gen'],'Location',[168,294,941,749])

add_block('built-in/Inport',[sys,'/','gen/in_vdse'])
set_param([sys,'/','gen/in_vdse'],...
		'Port','2',...
		'position',[80,255,100,275])

add_block('built-in/Inport',[sys,'/','gen/in_vqse'])
set_param([sys,'/','gen/in_vqse'],...
		'position',[30,230,50,250])

add_block('built-in/Note',[sys,'/','gen/vdr'])
set_param([sys,'/','gen/vdr'],...
		'position',[190,265,195,270])

add_block('built-in/Note',[sys,'/','gen/vqr'])
set_param([sys,'/','gen/vqr'],...
		'position',[188,223,193,228])


%     Subsystem  'gen/qde2qdr'.

new_system([sys,'/','gen/qde2qdr'])
set_param([sys,'/','gen/qde2qdr'],'Location',[103,460,628,647])

add_block('built-in/Mux',[sys,'/','gen/qde2qdr/Mux'])
set_param([sys,'/','gen/qde2qdr/Mux'],...
		'hide name',0,...
		'inputs','3',...
		'position',[75,50,105,130])

add_block('built-in/Fcn',[sys,'/','gen/qde2qdr/fcn'])
set_param([sys,'/','gen/qde2qdr/fcn'],...
		'Expr','u[1]*cos(u[3]) - u[2]*sin(u[3])',...
		'position',[150,52,390,78])

add_block('built-in/Fcn',[sys,'/','gen/qde2qdr/fcn1'])
set_param([sys,'/','gen/qde2qdr/fcn1'],...
		'Expr','u[1]*sin(u[3]) + u[2]*cos(u[3])',...
		'position',[150,97,390,123])

add_block('built-in/Inport',[sys,'/','gen/qde2qdr/vde'])
set_param([sys,'/','gen/qde2qdr/vde'],...
		'Port','2',...
		'position',[15,80,35,100])

add_block('built-in/Inport',[sys,'/','gen/qde2qdr/delta '])
set_param([sys,'/','gen/qde2qdr/delta '],...
		'Port','3',...
		'position',[15,124,35,146])

add_block('built-in/Inport',[sys,'/','gen/qde2qdr/vqe'])
set_param([sys,'/','gen/qde2qdr/vqe'],...
		'position',[15,35,35,55])

add_block('built-in/Outport',[sys,'/','gen/qde2qdr/vdr'])
set_param([sys,'/','gen/qde2qdr/vdr'],...
		'Port','2',...
		'position',[445,100,465,120])

add_block('built-in/Outport',[sys,'/','gen/qde2qdr/vqr'])
set_param([sys,'/','gen/qde2qdr/vqr'],...
		'position',[445,55,465,75])
add_line([sys,'/','gen/qde2qdr'],[395,110;440,110])
add_line([sys,'/','gen/qde2qdr'],[40,45;50,45;50,65;70,65])
add_line([sys,'/','gen/qde2qdr'],[395,65;440,65])
add_line([sys,'/','gen/qde2qdr'],[110,90;125,90;125,65;145,65])
add_line([sys,'/','gen/qde2qdr'],[110,90;125,90;125,110;145,110])
add_line([sys,'/','gen/qde2qdr'],[40,135;50,135;50,115;70,115])
add_line([sys,'/','gen/qde2qdr'],[40,90;70,90])


%     Finished composite block 'gen/qde2qdr'.

set_param([sys,'/','gen/qde2qdr'],...
		'position',[135,229,175,301])


%     Subsystem  'gen/q_cct'.

new_system([sys,'/','gen/q_cct'])
set_param([sys,'/','gen/q_cct'],'Location',[154,128,1103,645])

add_block('built-in/Outport',[sys,'/','gen/q_cct/Out_psiq'])
set_param([sys,'/','gen/q_cct/Out_psiq'],...
		'position',[585,45,605,65])

add_block('built-in/Outport',[sys,'/','gen/q_cct/Out_-iq'])
set_param([sys,'/','gen/q_cct/Out_-iq'],...
		'Port','2',...
		'position',[830,230,850,250])

add_block('built-in/Outport',[sys,'/','gen/q_cct/Out_psimq'])
set_param([sys,'/','gen/q_cct/Out_psimq'],...
		'Port','3',...
		'position',[835,120,855,140])

add_block('built-in/Mux',[sys,'/','gen/q_cct/Mux4'])
set_param([sys,'/','gen/q_cct/Mux4'],...
		'inputs','2',...
		'position',[520,204,540,271])

add_block('built-in/Fcn',[sys,'/','gen/q_cct/Fcn4'])
set_param([sys,'/','gen/q_cct/Fcn4'],...
		'Expr','-(u[1]-u[2])/xls',...
		'position',[565,227,655,253])

add_block('built-in/Fcn',[sys,'/','gen/q_cct/Fcn3'])
set_param([sys,'/','gen/q_cct/Fcn3'],...
		'Expr','xMQ*(u[1]/xls+u[2]/xplkq2+u[3]/xplkq)',...
		'position',[565,114,775,146])