📄 s3.mdl
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Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Out_|It|"
Position [510, 130, 530, 150]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Pgen"
Position [510, 185, 530, 205]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Qgen"
Position [510, 235, 530, 255]
Port "4"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "vqr"
SrcPort 1
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "-iqr"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "vdr"
SrcPort 1
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "-idr"
SrcPort 1
DstBlock "Mux"
DstPort 4
}
Line {
SrcBlock "P"
SrcPort 1
DstBlock "Pgen"
DstPort 1
}
Line {
SrcBlock "Q"
SrcPort 1
DstBlock "Qgen"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [0, 0]
Branch {
Points [25, 0; 0, 25]
DstBlock "P"
DstPort 1
}
Branch {
Points [25, 0; 0, 75]
DstBlock "Q"
DstPort 1
}
Branch {
Points [25, 0; 0, -80]
DstBlock "Fcn"
DstPort 1
}
Branch {
Points [25, 0; 0, -30]
DstBlock "Fcn1"
DstPort 1
}
}
Line {
SrcBlock "Fcn1"
SrcPort 1
DstBlock "Out_|It|"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "Out_|Vt|"
DstPort 1
}
}
}
Block {
BlockType SubSystem
Name "d_cct"
Position [425, 284, 460, 341]
ShowPortLabels off
System {
Name "d_cct"
Location [79, 45, 797, 528]
Open off
ScreenColor white
Block {
BlockType Inport
Name "In_vdr"
Position [50, 105, 70, 125]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "In_wrpsiq"
Position [50, 160, 70, 180]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "In_Ef"
Position [50, 250, 70, 270]
Port "3"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Fcn
Name "Fcn"
Position [180, 125, 375, 155]
Expr "wb*(u[2]+u[3]+(rs/xls)*(u[1]-u[4]))"
}
Block {
BlockType Fcn
Name "Fcn1"
Position [175, 245, 375, 275]
Expr "wb*rpf*(u[2]/xmd+(u[1]-u[3])/xplf)"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [180, 356, 365, 384]
Expr "wb*rpkd*(u[1]-u[2])/xplkd"
}
Block {
BlockType Fcn
Name "Fcn3"
Position [535, 112, 715, 148]
Expr "xMD*(u[1]/xls+u[2]/xplf+u[3]/xplkd)"
}
Block {
BlockType Fcn
Name "Fcn4"
Position [565, 227, 655, 253]
Expr "-(u[1]-u[2])/xls"
}
Block {
BlockType Fcn
Name "Fcn5"
Position [565, 332, 655, 358]
Expr "(u[1]-u[2])/xplf"
}
Block {
BlockType Mux
Name "Mux"
Position [135, 86, 160, 189]
Inputs "4"
}
Block {
BlockType Mux
Name "Mux1"
Position [135, 217, 160, 303]
Inputs "3"
}
Block {
BlockType Mux
Name "Mux2"
Position [130, 330, 155, 405]
Inputs "2"
}
Block {
BlockType Mux
Name "Mux3"
Position [495, 87, 520, 173]
Inputs "3"
}
Block {
BlockType Mux
Name "Mux4"
Position [520, 204, 540, 271]
Inputs "2"
}
Block {
BlockType Mux
Name "Mux5"
Position [520, 309, 540, 376]
Inputs "2"
}
Block {
BlockType Integrator
Name "psid_"
Position [390, 127, 420, 153]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psido"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "psipf_"
Position [390, 247, 420, 273]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psifo"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "psipkd_"
Position [390, 357, 420, 383]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psikdo"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Outport
Name "Out_psid"
Position [585, 45, 605, 65]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Out_-id"
Position [755, 230, 775, 250]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Out_psimd"
Position [750, 120, 770, 140]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Out_ipf"
Position [745, 335, 765, 355]
Port "4"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "In_wrpsiq"
SrcPort 1
Points [20, 0; 0, -20]
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "In_vdr"
SrcPort 1
Points [20, 0; 0, 10]
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fcn"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "psid_"
DstPort 1
}
Line {
SrcBlock "Mux1"
SrcPort 1
DstBlock "Fcn1"
DstPort 1
}
Line {
SrcBlock "Fcn1"
SrcPort 1
DstBlock "psipf_"
DstPort 1
}
Line {
SrcBlock "In_Ef"
SrcPort 1
DstBlock "Mux1"
DstPort 2
}
Line {
SrcBlock "Mux2"
SrcPort 1
DstBlock "Fcn2"
DstPort 1
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "psipkd_"
DstPort 1
}
Line {
SrcBlock "psid_"
SrcPort 1
Points [0, 0]
Branch {
Points [10, 0; 0, 65; -320, 0; 0, -30]
DstBlock "Mux"
DstPort 4
}
Branch {
Points [10, 0; 0, -40]
DstBlock "Mux3"
DstPort 1
}
Branch {
Points [45, 0; 0, 80]
DstBlock "Mux4"
DstPort 1
}
Branch {
Points [10, 0; 0, -85]
DstBlock "Out_psid"
DstPort 1
}
}
Line {
SrcBlock "psipf_"
SrcPort 1
Points [0, 0]
Branch {
Points [25, 0; 0, 60; -335, 0; 0, -30]
DstBlock "Mux1"
DstPort 3
}
Branch {
Points [25, 0; 0, -130]
DstBlock "Mux3"
DstPort 2
}
Branch {
Points [60, 0; 0, 65]
DstBlock "Mux5"
DstPort 1
}
}
Line {
SrcBlock "psipkd_"
SrcPort 1
Points [0, 0]
Branch {
Points [35, 0; 0, 60; -350, 0; 0, -45]
DstBlock "Mux2"
DstPort 2
}
Branch {
Points [35, 0; 0, -210]
DstBlock "Mux3"
DstPort 3
}
}
Line {
SrcBlock "Mux3"
SrcPort 1
DstBlock "Fcn3"
DstPort 1
}
Line {
SrcBlock "Mux4"
SrcPort 1
DstBlock "Fcn4"
DstPort 1
}
Line {
SrcBlock "Mux5"
SrcPort 1
DstBlock "Fcn5"
DstPort 1
}
Line {
SrcBlock "Fcn3"
SrcPort 1
Points [5, 0]
Branch {
Points [0, 315; -230, 0; 0, -85]
DstBlock "Mux5"
DstPort 2
}
Branch {
Points [0, 175; -230, 0; 0, -50]
DstBlock "Mux4"
DstPort 2
}
Branch {
Points [0, 315; -635, 0; 0, -95]
DstBlock "Mux2"
DstPort 1
}
Branch {
Points [0, 315; -635, 0; 0, -215]
DstBlock "Mux1"
DstPort 1
}
Branch {
Points [0, -50; -610, 0; 0, 20]
DstBlock "Mux"
DstPort 1
}
Branch {
DstBlock "Out_psimd"
DstPort 1
}
}
Line {
SrcBlock "Fcn4"
SrcPort 1
DstBlock "Out_-id"
DstPort 1
}
Line {
SrcBlock "Fcn5"
SrcPort 1
DstBlock "Out_ipf"
DstPort 1
}
}
}
Block {
BlockType Product
Name "prod1"
Position [435, 159, 450, 186]
Orientation left
Inputs "2"
}
Block {
BlockType Product
Name "prod2"
Position [435, 358, 450, 387]
Orientation left
Inputs "2"
}
Block {
BlockType SubSystem
Name "q_cct"
Position [425, 204, 460, 256]
ShowPortLabels off
System {
Name "q_cct"
Location [42, 119, 705, 469]
Open off
ScreenColor white
Block {
BlockType Inport
Name "In_vqr"
Position [50, 105, 70, 125]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "In_wrpsid"
Position [50, 160, 70, 180]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Fcn
Name "Fcn"
Position [180, 124, 335, 156]
Expr "wb*(u[2]-u[3]+(rs/xls)*(u[1]-u[4]))"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [180, 229, 330, 261]
Expr "wb*rpkq*(u[1]-u[2])/xplkq"
}
Block {
BlockType Fcn
Name "Fcn3"
Position [500, 113, 620, 147]
Expr "xMQ*(u[1]/xls+u[2]/xplkq)"
}
Block {
BlockType Fcn
Name "Fcn4"
Position [505, 202, 595, 228]
Expr "-(u[1]-u[2])/xls"
}
Block {
BlockType Mux
Name "Mux"
Position [135, 86, 160, 189]
Inputs "4"
}
Block {
BlockType Mux
Name "Mux2"
Position [135, 213, 160, 277]
Inputs "2"
}
Block {
BlockType Mux
Name "Mux3"
Position [455, 92, 480, 163]
Inputs "2"
}
Block {
BlockType Mux
Name "Mux4"
Position [455, 179, 475, 246]
Inputs "2"
}
Block {
BlockType Integrator
Name "psipkq_"
Position [345, 232, 375, 258]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psikqo"
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