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📄 s3eig.mdl

📁 simulink electrical machine(2)
💻 MDL
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	}
	Block {
	  BlockType		  Fcn
	  Name			  "Fcn2"
	  Position		  [185, 231, 370, 259]
	  Expr			  "wb*rpkq*(u[1]-u[2])/xplkq"
	}
	Block {
	  BlockType		  Fcn
	  Name			  "Fcn3"
	  Position		  [565, 113, 715, 147]
	  Expr			  "xMQ*(u[1]/xls+u[2]/xplkq)"
	}
	Block {
	  BlockType		  Fcn
	  Name			  "Fcn4"
	  Position		  [565, 202, 655, 228]
	  Expr			  "-(u[1]-u[2])/xls"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux"
	  Position		  [135, 86, 160, 189]
	  Inputs		  "4"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux2"
	  Position		  [135, 213, 160, 277]
	  Inputs		  "2"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux3"
	  Position		  [515, 92, 540, 163]
	  Inputs		  "2"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux4"
	  Position		  [520, 179, 540, 246]
	  Inputs		  "2"
	}
	Block {
	  BlockType		  Integrator
	  Name			  "psipkq_"
	  Position		  [395, 232, 425, 258]
	  ExternalReset		  none
	  InitialConditionSource  internal
	  InitialCondition	  "Psikqo"
	  LimitOutput		  off
	  UpperSaturationLimit	  "inf"
	  LowerSaturationLimit	  "-inf"
	  ShowSaturationPort	  off
	  ShowStatePort		  off
	  AbsoluteTolerance	  "auto"
	}
	Block {
	  BlockType		  Integrator
	  Name			  "psiq_"
	  Position		  [390, 127, 420, 153]
	  ExternalReset		  none
	  InitialConditionSource  internal
	  InitialCondition	  "Psiqo"
	  LimitOutput		  off
	  UpperSaturationLimit	  "inf"
	  LowerSaturationLimit	  "-inf"
	  ShowSaturationPort	  off
	  ShowStatePort		  off
	  AbsoluteTolerance	  "auto"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out_psiq"
	  Position		  [585, 45, 605, 65]
	  Port			  "1"
	  OutputWhenDisabled	  held
	  InitialOutput		  "0"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out_-iq"
	  Position		  [805, 205, 825, 225]
	  Port			  "2"
	  OutputWhenDisabled	  held
	  InitialOutput		  "0"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out_psimq"
	  Position		  [805, 120, 825, 140]
	  Port			  "3"
	  OutputWhenDisabled	  held
	  InitialOutput		  "0"
	}
	Line {
	  SrcBlock		  "Fcn4"
	  SrcPort		  1
	  DstBlock		  "Out_-iq"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Fcn3"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    DstBlock		    "Out_psimq"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [35, 0; 0, -50; -640, 0; 0, 20]
	    DstBlock		    "Mux"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [35, 0; 0, 185; -665, 0; 0, -85]
	    DstBlock		    "Mux2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [35, 0; 0, 185; -260, 0; 0, -85]
	    DstBlock		    "Mux4"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Mux4"
	  SrcPort		  1
	  DstBlock		  "Fcn4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux3"
	  SrcPort		  1
	  DstBlock		  "Fcn3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "psipkq_"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    Points		    [30, 0; 0, -100]
	    DstBlock		    "Mux3"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [30, 0; 0, 60; -345, 0; 0, -45]
	    DstBlock		    "Mux2"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "psiq_"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    Points		    [10, 0; 0, -85]
	    DstBlock		    "Out_psiq"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [45, 0; 0, 55]
	    DstBlock		    "Mux4"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [10, 0; 0, -30]
	    DstBlock		    "Mux3"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [10, 0; 0, 65; -320, 0; 0, -30]
	    DstBlock		    "Mux"
	    DstPort		    4
	  }
	}
	Line {
	  SrcBlock		  "Fcn2"
	  SrcPort		  1
	  DstBlock		  "psipkq_"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux2"
	  SrcPort		  1
	  DstBlock		  "Fcn2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Fcn"
	  SrcPort		  1
	  DstBlock		  "psiq_"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "Fcn"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "In_vqr"
	  SrcPort		  1
	  Points		  [20, 0; 0, 10]
	  DstBlock		  "Mux"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "In_wrpsid"
	  SrcPort		  1
	  Points		  [20, 0; 0, -20]
	  DstBlock		  "Mux"
	  DstPort		  3
	}
      }
    }
    Block {
      BlockType		      Outport
      Name		      "out_Pgen"
      Position		      [665, 55, 685, 75]
      Port		      "1"
      OutputWhenDisabled      held
      InitialOutput	      "0"
    }
    Block {
      BlockType		      Outport
      Name		      "out_Qgen"
      Position		      [625, 70, 645, 90]
      Port		      "2"
      OutputWhenDisabled      held
      InitialOutput	      "0"
    }
    Block {
      BlockType		      Outport
      Name		      "out_delta"
      Position		      [665, 170, 685, 190]
      Port		      "3"
      OutputWhenDisabled      held
      InitialOutput	      "0"
    }
    Block {
      BlockType		      Outport
      Name		      "out_Tem"
      Position		      [665, 240, 685, 260]
      Port		      "4"
      OutputWhenDisabled      held
      InitialOutput	      "0"
    }
    Block {
      BlockType		      Outport
      Name		      "out_(wr-we)/wb"
      Position		      [665, 275, 685, 295]
      Port		      "5"
      OutputWhenDisabled      held
      InitialOutput	      "0"
    }
    Line {
      SrcBlock		      "d_cct"
      SrcPort		      4
      DstBlock		      "T4"
      DstPort		      1
    }
    Line {
      SrcBlock		      "d_cct"
      SrcPort		      3
      DstBlock		      "T3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "q_cct"
      SrcPort		      3
      DstBlock		      "T2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "VIPQ"
      SrcPort		      2
      DstBlock		      "T1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "VIPQ"
      SrcPort		      1
      DstBlock		      "T"
      DstPort		      1
    }
    Line {
      SrcBlock		      "prod1"
      SrcPort		      1
      Points		      [-27, 0; 0, 70]
      DstBlock		      "q_cct"
      DstPort		      2
    }
    Line {
      SrcBlock		      "VIPQ"
      SrcPort		      4
      DstBlock		      "out_Qgen"
      DstPort		      1
    }
    Line {
      SrcBlock		      "VIPQ"
      SrcPort		      3
      DstBlock		      "out_Pgen"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Fcn1"
      SrcPort		      1
      Points		      [0, 0]
      Branch {
	Points			[3, 0; 0, -180]
	DstBlock		"VIPQ"
	DstPort			3
      }
      Branch {
	DstBlock		"d_cct"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Fcn"
      SrcPort		      1
      Points		      [0, 0]
      Branch {
	Points			[33, 0; 0, -160]
	DstBlock		"VIPQ"
	DstPort			1
      }
      Branch {
	Points			[33, 0; 0, -25]
	DstBlock		"q_cct"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "d_cct"
      SrcPort		      2
      Points		      [0, 0]
      Branch {
	Points			[68, 0; 0, -175]
	DstBlock		"VIPQ"
	DstPort			4
      }
      Branch {
	DstBlock		"Rotor"
	DstPort			4
      }
    }
    Line {
      SrcBlock		      "q_cct"
      SrcPort		      2
      Points		      [0, 0]
      Branch {
	Points			[53, 0; 0, -130]
	DstBlock		"VIPQ"
	DstPort			2
      }
      Branch {
	DstBlock		"Rotor"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Mux1"
      SrcPort		      1
      Points		      [0, 0]
      Branch {
	Points			[3, 0; 0, 35]
	DstBlock		"Fcn1"
	DstPort			1
      }
      Branch {
	Points			[3, 0; 0, -15]
	DstBlock		"Fcn"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Rotor"
      SrcPort		      1
      Points		      [0, 0]
      Branch {
	Points			[3, 0; 0, -76; -540, 0; 0, 66]
	DstBlock		"Mux1"
	DstPort			1
      }
      Branch {
	DstBlock		"out_delta"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "in_vdse"
      SrcPort		      1
      DstBlock		      "Mux1"
      DstPort		      3
    }
    Line {
      SrcBlock		      "in_vqse"
      SrcPort		      1
      DstBlock		      "Mux1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "in_Tmech"
      SrcPort		      1
      DstBlock		      "Rotor"
      DstPort		      5
    }
    Line {
      SrcBlock		      "Rotor"
      SrcPort		      4
      DstBlock		      "out_(wr-we)/wb"
      DstPort		      1
    }
    Line {
      SrcBlock		      "in_Ex"
      SrcPort		      1
      DstBlock		      "d_cct"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Rotor"
      SrcPort		      3
      DstBlock		      "out_Tem"
      DstPort		      1
    }
    Line {
      SrcBlock		      "prod2"
      SrcPort		      1
      Points		      [-37, 0; 0, -60]
      DstBlock		      "d_cct"
      DstPort		      2
    }
    Line {
      SrcBlock		      "d_cct"
      SrcPort		      1
      Points		      [0, 0]
      Branch {
	Points			[98, 0; 0, -35]
	DstBlock		"Rotor"
	DstPort			2
      }
      Branch {
	Points			[43, 0; 0, -125]
	DstBlock		"prod1"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "q_cct"
      SrcPort		      1
      Points		      [0, 0]
      Branch {
	Points			[83, 0; 0, 65]
	DstBlock		"Rotor"
	DstPort			3
      }
      Branch {
	Points			[3, 0; 0, 150]
	DstBlock		"prod2"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Rotor"
      SrcPort		      2
      Points		      [0, 0]
      Branch {
	Points			[13, 0; 0, 115]
	DstBlock		"prod2"
	DstPort			2
      }
      Branch {
	Points			[13, 0; 0, -85]
	DstBlock		"prod1"
	DstPort			2
      }
    }
    Annotation {
      Position		      [430, 168]
      VerticalAlignment	      top
      Text		      "-iqr"
    }
    Annotation {
      Position		      [430, 228]
      VerticalAlignment	      top
      Text		      "psid"
    }
    Annotation {
      Position		      [430, 153]
      VerticalAlignment	      top
      Text		      "psiq"
    }
    Annotation {
      Position		      [435, 243]
      VerticalAlignment	      top
      Text		      "-idr"
    }
    Annotation {
      Position		      [320, 231]
      VerticalAlignment	      top
      Text		      "vdr"
    }
    Annotation {
      Position		      [318, 179]
      VerticalAlignment	      top
      Text		      "vqr"
    }
  }
}

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