📄 s5.mdl
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Points [5, 0; 0, -20]
DstBlock "Mux2"
DstPort 2
}
Branch {
Points [5, 0; 0, -55]
DstBlock "Out_psid"
DstPort 1
}
Branch {
DstBlock "Mux3"
DstPort 1
}
Branch {
Points [5, 0; 0, 80; -320, 0; 0, -50]
DstBlock "Mux"
DstPort 4
}
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "psipkd3"
DstPort 1
}
Line {
SrcBlock "Fcn1"
SrcPort 1
DstBlock "psipf"
DstPort 1
}
Line {
SrcBlock "Mux1"
SrcPort 1
DstBlock "Fcn1"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "psid"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fcn"
DstPort 1
}
Line {
SrcBlock "In_vd"
SrcPort 1
Points [20, 0; 0, 10]
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "In_wrpsiq"
SrcPort 1
Points [20, 0; 0, -15]
DstBlock "Mux"
DstPort 3
}
}
}
Block {
BlockType Product
Name "prod1"
Position [165, 148, 185, 172]
Orientation left
Inputs "2"
}
Block {
BlockType Product
Name "prod2"
Position [165, 193, 185, 222]
Orientation left
Inputs "2"
}
Block {
BlockType SubSystem
Name "q_cct"
Position [155, 53, 195, 127]
ShowPortLabels off
System {
Name "q_cct"
Location [29, 85, 833, 592]
Open off
ScreenColor white
Block {
BlockType Inport
Name "In_vq"
Position [50, 105, 70, 125]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "In_wrpsid"
Position [50, 160, 70, 180]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Fcn
Name "Fcn"
Position [180, 125, 375, 155]
Expr "wb*(u[2]-u[3]+(rs/xls)*(u[1]-u[4]))"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [180, 236, 365, 264]
Expr "wb*rpkq3*(u[1]-u[2])/xplkq3"
}
Block {
BlockType Fcn
Name "Fcn3"
Position [565, 151, 720, 179]
Expr "xMQ*(u[1]/xls+u[2]/xplkq3+u[3]/xplkq2+u["
"4]/xplkq1)"
}
Block {
BlockType Fcn
Name "Fcn4"
Position [575, 237, 665, 263]
Expr "-(u[1]-u[2])/xls"
}
Block {
BlockType Fcn
Name "Fcn5"
Position [180, 331, 365, 359]
Expr "wb*rpkq2*(u[1]-u[2])/xplkq2"
}
Block {
BlockType Fcn
Name "Fcn6"
Position [180, 411, 365, 439]
Expr "wb*rpkq1*(u[1]-u[2])/xplkq1"
}
Block {
BlockType Mux
Name "Mux"
Position [135, 86, 160, 189]
Inputs "4"
}
Block {
BlockType Mux
Name "Mux2"
Position [130, 220, 155, 275]
Inputs "2"
}
Block {
BlockType Mux
Name "Mux3"
Position [515, 128, 540, 197]
Inputs "4"
}
Block {
BlockType Mux
Name "Mux4"
Position [515, 214, 540, 281]
Inputs "2"
}
Block {
BlockType Mux
Name "Mux5"
Position [130, 315, 155, 370]
Inputs "2"
}
Block {
BlockType Mux
Name "Mux6"
Position [130, 396, 155, 454]
Inputs "2"
}
Block {
BlockType Integrator
Name "psipkq1"
Position [390, 412, 420, 438]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psikq1o"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "psipkq2"
Position [390, 332, 420, 358]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psikq2o"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "psipkq3"
Position [390, 237, 420, 263]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psikq3o"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "psiq"
Position [390, 127, 420, 153]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psiqo"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Outport
Name "Out_psiq"
Position [575, 95, 595, 115]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Out_-iq"
Position [790, 240, 810, 260]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Out_psimq"
Position [790, 155, 810, 175]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "psipkq1"
SrcPort 1
Points [0, 0]
Branch {
Points [55, 0; 0, -240]
DstBlock "Mux3"
DstPort 4
}
Branch {
Points [54, 0; 0, 45; -370, 0; 0, -30]
DstBlock "Mux6"
DstPort 2
}
}
Line {
SrcBlock "Fcn6"
SrcPort 1
DstBlock "psipkq1"
DstPort 1
}
Line {
SrcBlock "Mux6"
SrcPort 1
DstBlock "Fcn6"
DstPort 1
}
Line {
SrcBlock "psipkq2"
SrcPort 1
Points [0, 0]
Branch {
Points [45, 0; 0, -175]
DstBlock "Mux3"
DstPort 3
}
Branch {
Points [45, 0; 0, 40; -360, 0; 0, -30]
DstBlock "Mux5"
DstPort 2
}
}
Line {
SrcBlock "Fcn5"
SrcPort 1
DstBlock "psipkq2"
DstPort 1
}
Line {
SrcBlock "Mux5"
SrcPort 1
DstBlock "Fcn5"
DstPort 1
}
Line {
SrcBlock "psipkq3"
SrcPort 1
Points [0, 0]
Branch {
Points [35, 0; 0, -95]
DstBlock "Mux3"
DstPort 2
}
Branch {
Points [35, 0; 0, 40; -350, 0; 0, -30]
DstBlock "Mux2"
DstPort 2
}
}
Line {
SrcBlock "Fcn4"
SrcPort 1
DstBlock "Out_-iq"
DstPort 1
}
Line {
SrcBlock "Fcn3"
SrcPort 1
Points [0, 0]
Branch {
Points [20, 0; 0, 140; -655, 0; 0, 105]
DstBlock "Mux6"
DstPort 1
}
Branch {
Points [20, 0; 0, 140; -655, 0; 0, 25]
DstBlock "Mux5"
DstPort 1
}
Branch {
DstBlock "Out_psimq"
DstPort 1
}
Branch {
Points [20, 0; 0, -85; -630, 0; 0, 20]
DstBlock "Mux"
DstPort 1
}
Branch {
Points [20, 0; 0, 140; -655, 0; 0, -70]
DstBlock "Mux2"
DstPort 1
}
Branch {
Points [20, 0; 0, 140; -250, 0; 0, -40]
DstBlock "Mux4"
DstPort 2
}
}
Line {
SrcBlock "Mux4"
SrcPort 1
DstBlock "Fcn4"
DstPort 1
}
Line {
SrcBlock "Mux3"
SrcPort 1
DstBlock "Fcn3"
DstPort 1
}
Line {
SrcBlock "psiq"
SrcPort 1
Points [0, 0]
Branch {
Points [10, 0; 0, -35]
DstBlock "Out_psiq"
DstPort 1
}
Branch {
Points [25, 0; 0, 90]
DstBlock "Mux4"
DstPort 1
}
Branch {
DstBlock "Mux3"
DstPort 1
}
Branch {
Points [10, 0; 0, 65; -320, 0; 0, -30]
DstBlock "Mux"
DstPort 4
}
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "psipkq3"
DstPort 1
}
Line {
SrcBlock "Mux2"
SrcPort 1
DstBlock "Fcn2"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "psiq"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fcn"
DstPort 1
}
Line {
SrcBlock "In_vq"
SrcPort 1
Points [20, 0; 0, 10]
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "In_wrpsid"
SrcPort 1
Points [20, 0; 0, -20]
DstBlock "Mux"
DstPort 3
}
}
}
Block {
BlockType Outport
Name "iq_gen"
Position [340, 80, 360, 100]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "delta"
Position [450, 235, 470, 255]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "wr/wb"
Position [500, 260, 520, 280]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "Tem"
Position [455, 285, 475, 305]
Port "4"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "id_gen"
Position [265, 310, 285, 330]
Port "5"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "ipf"
Position [195, 350, 215, 370]
Orientation down
Port "6"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "Rotor"
SrcPort 4
DstBlock "T2"
DstPort 1
}
Line {
SrcBlock "d_cct"
SrcPort 3
DstBlock "T1"
DstPort 1
}
Line {
SrcBlock "q_cct"
SrcPort 3
DstBlock "T"
DstPort 1
}
Line {
SrcBlock "d_cct"
SrcPort 4
Points [10, 0]
DstBlock "ipf"
DstPort 1
}
Line {
SrcBlock "prod2"
SrcPort 1
Points [-40, 0; 0, 80]
DstBlock "d_cct"
DstPort 2
}
Line {
SrcBlock "vd"
SrcPort 1
DstBlock "d_cct"
DstPort 1
}
Line {
SrcBlock "Ef"
SrcPort 1
DstBlock "d_cct"
DstPort 3
}
Line {
SrcBlock "q_cct"
SrcPort 1
Points [0, 0]
Branch {
Points [55, 0; 0, 150]
DstBlock "prod2"
DstPort 2
}
Branch {
Points [55, 0; 0, 215]
DstBlock "Rotor"
DstPort 3
}
}
Line {
SrcBlock "Rotor"
SrcPort 2
Points [0, 0]
Branch {
Points [15, 0; 0, -70]
DstBlock "prod2"
DstPort 1
}
Branch {
Points [15, 0; 0, -115]
DstBlock "prod1"
DstPort 1
}
Branch {
DstBlock "wr/wb"
DstPort 1
}
}
Line {
SrcBlock "d_cct"
SrcPort 1
Points [0, 0]
Branch {
Points [40, 0; 0, -95]
DstBlock "prod1"
DstPort 2
}
Branch {
DstBlock "Rotor"
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