📄 s1c.mdl
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}
Block {
BlockType Mux
Name "Mux"
Position [350, 46, 370, 264]
Inputs "3"
}
Block {
BlockType Lookup
Name "Volts/hertz"
Position [125, 63, 200, 107]
InputValues "we_vf"
OutputValues "vrms_vf"
}
Block {
BlockType Integrator
Name "cos"
Position [225, 135, 260, 175]
ExternalReset none
InitialConditionSource internal
InitialCondition "1"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "sin"
Position [235, 246, 270, 284]
ExternalReset none
InitialConditionSource internal
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Outport
Name "vag"
Position [620, 85, 640, 105]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "vbg"
Position [620, 145, 640, 165]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "vcg"
Position [620, 205, 640, 225]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "Volts/hertz"
SrcPort 1
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "we"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "Volts/hertz"
DstPort 1
}
Branch {
Points [20, 0; 0, 170]
DstBlock "Inner\nProduct"
DstPort 1
}
Branch {
Points [20, 0; 0, 60]
DstBlock "Inner\nProduct1"
DstPort 1
}
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [0, 0]
Branch {
Points [10, 0; 0, 60]
DstBlock "Fcn2"
DstPort 1
}
Branch {
DstBlock "Fcn1"
DstPort 1
}
Branch {
Points [10, 0; 0, -60]
DstBlock "Fcn"
DstPort 1
}
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "vcg"
DstPort 1
}
Line {
SrcBlock "Fcn1"
SrcPort 1
DstBlock "vbg"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "vag"
DstPort 1
}
Line {
SrcBlock "sin"
SrcPort 1
Points [0, 0]
Branch {
Points [10, 0; 0, -40]
DstBlock "Mux"
DstPort 3
}
Branch {
Points [10, 0; 0, -40; -140, 0]
DstBlock "Inner\nProduct1"
DstPort 2
}
}
Line {
SrcBlock "cos"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "Mux"
DstPort 2
}
Branch {
Points [10, 0; 0, -30; -170, 0; 0, 145]
DstBlock "Inner\nProduct"
DstPort 2
}
}
Line {
SrcBlock "Inner\nProduct1"
SrcPort 1
DstBlock "cos"
DstPort 1
}
Line {
SrcBlock "Inner\nProduct"
SrcPort 1
DstBlock "-1"
DstPort 1
}
Line {
SrcBlock "-1"
SrcPort 1
DstBlock "sin"
DstPort 1
}
Annotation {
Position [297, 208]
VerticalAlignment top
Text "-sin_wet"
}
Annotation {
Position [307, 131]
VerticalAlignment top
Text "cos_wet"
}
Annotation {
Position [192, 327]
VerticalAlignment top
Text "variable frequency oscillator"
}
Annotation {
Position [502, 317]
VerticalAlignment top
Text "2-phase to 3-phase "
}
Annotation {
Position [252, 67]
VerticalAlignment top
Text "Vpeak"
}
}
}
Block {
BlockType SubSystem
Name "abc2qds"
Position [405, 151, 450, 254]
ShowPortLabels off
System {
Name "abc2qds"
Location [67, 140, 631, 477]
Open off
ScreenColor white
Block {
BlockType Inport
Name "vag"
Position [40, 100, 60, 120]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "vbg"
Position [40, 160, 60, 180]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "vcg"
Position [40, 220, 60, 240]
Port "3"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "ias+ibs+ics"
Position [40, 285, 60, 305]
Port "4"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Gain
Name "1/Csg"
Position [105, 274, 195, 316]
Gain "50*Zb*wb"
}
Block {
BlockType Fcn
Name "Fcn"
Position [210, 86, 375, 124]
Expr "(2/3)*(u[1] - (u[2]+u[3])/2)"
}
Block {
BlockType Fcn
Name "Fcn1"
Position [210, 150, 375, 190]
Expr "(u[3]-u[2])/sqrt(3)"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [210, 215, 375, 255]
Expr "(u[1]+u[2]+u[3])/3"
}
Block {
BlockType Integrator
Name "Integrator"
Position [230, 280, 260, 310]
ExternalReset none
InitialConditionSource internal
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Mux
Name "Mux"
Position [105, 81, 145, 259]
Inputs "3"
}
Block {
BlockType Sum
Name "Sum"
Position [465, 224, 480, 271]
Inputs "+-"
}
Block {
BlockType Sum
Name "Sum1"
Position [460, 94, 475, 141]
Inputs "+-"
}
Block {
BlockType Outport
Name "vqs"
Position [515, 110, 535, 130]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "vds"
Position [515, 160, 535, 180]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "v0s"
Position [515, 240, 535, 260]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "Integrator"
SrcPort 1
Points [0, 0]
Branch {
Points [140, 0; 0, -165]
DstBlock "Sum1"
DstPort 2
}
Branch {
Points [140, 0; 0, -35]
DstBlock "Sum"
DstPort 2
}
}
Line {
SrcBlock "Sum1"
SrcPort 1
DstBlock "vqs"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "Sum1"
DstPort 1
}
Line {
SrcBlock "1/Csg"
SrcPort 1
DstBlock "Integrator"
DstPort 1
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "v0s"
DstPort 1
}
Line {
SrcBlock "Fcn1"
SrcPort 1
DstBlock "vds"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [0, 0]
Branch {
Points [20, 0; 0, 65]
DstBlock "Fcn2"
DstPort 1
}
Branch {
Points [20, 0; 0, -65]
DstBlock "Fcn"
DstPort 1
}
Branch {
DstBlock "Fcn1"
DstPort 1
}
}
Line {
SrcBlock "vcg"
SrcPort 1
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "vbg"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "vag"
SrcPort 1
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "ias+ibs+ics"
SrcPort 1
DstBlock "1/Csg"
DstPort 1
}
Annotation {
Position [337, 282]
VerticalAlignment top
Text "vsg"
}
Annotation {
Position [257, 52]
VerticalAlignment top
Text "abc to qd0 stationary "
}
}
}
Block {
BlockType SubSystem
Name "induction machine\nin stationary qd0"
Position [495, 154, 545, 286]
ShowPortLabels off
System {
Name "induction machine\nin stationary qd0"
Location [21, 119, 775, 541]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_vqs"
Position [115, 80, 135, 100]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_vds"
Position [115, 255, 135, 275]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_v0s"
Position [115, 320, 135, 340]
Port "3"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_Tmech"
Position [450, 195, 470, 215]
Orientation left
Port "4"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType SubSystem
Name "Daxis"
Position [245, 250, 280, 305]
ShowPortLabels off
System {
Name "Daxis"
Location [-46, 86, 758, 500]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_vds"
Position [50, 140, 70, 160]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_(wr/wb)*psiqr'"
Position [45, 290, 65, 310]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Fcn
Name "Fcn"
Position [145, 135, 310, 165]
Expr "wb*(u[2]+(rs/xls)*(u[1]-u[3]))"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [145, 284, 325, 316]
Expr "wb*(-u[2] +(rpr/xplr)*(u[3]-u[1]))"
}
Block {
BlockType Fcn
Name "Fcn3"
Position [485, 207, 635, 243]
Expr "xM*(u[1]/xls+u[2]/xplr)"
}
Block {
BlockType Fcn
Name "Fcn4"
Position [495, 126, 585, 154]
Expr "(u[1]-u[2])/xls"
}
Block {
BlockType Fcn
Name "Fcn5"
Position [490, 300, 585, 330]
Expr "(u[1]-u[2])/xplr"
}
Block {
BlockType Mux
Name "Mux"
Position [100, 108, 120, 192]
Inputs "3"
}
Block {
BlockType Mux
Name "Mux1"
Position [105, 262, 125, 338]
Inputs "3"
}
Block {
BlockType Mux
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