📄 s4.mdl
字号:
Points [50, 0; 0, -135; -615, 0; 0, 30]
DstBlock "Mux"
DstPort 1
}
Branch {
Points [50, 0; 0, 165; -620, 0; 0, -35]
DstBlock "Mux1"
DstPort 3
}
Branch {
Points [50, 0; 0, -45; -270, 0; 0, -30]
DstBlock "Mux4"
DstPort 2
}
Branch {
DstBlock "out_psim"
DstPort 1
}
}
Line {
SrcBlock "Mux2"
SrcPort 1
DstBlock "Fcn5"
DstPort 1
}
Line {
SrcBlock "psi2'_"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "Mux2"
DstPort 1
}
Branch {
Points [25, 0; 0, -105]
DstBlock "Mux3"
DstPort 2
}
Branch {
Points [25, 0; 0, -45; -320, 0; 0, 20]
DstBlock "Mux1"
DstPort 1
}
}
Line {
SrcBlock "Mux1"
SrcPort 1
DstBlock "Fcn2"
DstPort 1
}
Line {
SrcBlock "psi1_"
SrcPort 1
Points [0, 0]
Branch {
Points [35, 0; 0, 55; -325, 0; 0, -25]
DstBlock "Mux"
DstPort 3
}
Branch {
Points [35, 0; 0, -25]
DstBlock "Mux4"
DstPort 1
}
Branch {
Points [35, 0; 0, 55]
DstBlock "Mux3"
DstPort 1
}
Branch {
Points [35, 0; 0, -75]
DstBlock "out_psi1"
DstPort 1
}
}
Line {
SrcBlock "Mux4"
SrcPort 1
DstBlock "Fcn4"
DstPort 1
}
Line {
SrcBlock "Mux3"
SrcPort 1
DstBlock "Fcn3"
DstPort 1
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "psi2'_"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "psi1_"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fcn"
DstPort 1
}
Line {
SrcBlock "Fcn4"
SrcPort 1
DstBlock "out_i1"
DstPort 1
}
Line {
SrcBlock "in_1"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "in_2"
SrcPort 1
DstBlock "Mux1"
DstPort 2
}
Line {
SrcBlock "Fcn5"
SrcPort 1
DstBlock "out_i2'"
DstPort 1
}
Annotation {
Position [577, 329]
VerticalAlignment top
Text "i2'"
}
Annotation {
Position [452, 264]
VerticalAlignment top
Text "Dpsi"
}
Annotation {
Position [642, 207]
VerticalAlignment top
Text "psim"
}
Annotation {
Position [362, 313]
VerticalAlignment top
Text "psi2'"
}
Annotation {
Position [357, 132]
VerticalAlignment top
Text "psi1"
}
Annotation {
Position [577, 127]
VerticalAlignment top
Text "i1"
}
}
}
Block {
BlockType SubSystem
Name "CAcn_unit"
Position [230, 400, 260, 450]
ShowPortLabels off
System {
Name "CAcn_unit"
Location [46, 91, 850, 510]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_1"
Position [25, 140, 45, 160]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_2"
Position [30, 320, 50, 340]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Fcn
Name "Fcn"
Position [120, 135, 285, 165]
Expr "wb*(u[2]-(r1/xl1)*(u[3]-u[1]))"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [120, 314, 300, 346]
Expr "wb*(u[2] -(rp2/xpl2)*(u[1]-u[3]))"
}
Block {
BlockType Fcn
Name "Fcn3"
Position [440, 206, 615, 244]
Expr "xM*(u[1]/xl1+u[2]/xpl2-u[3]/xm)"
}
Block {
BlockType Fcn
Name "Fcn4"
Position [470, 126, 560, 154]
Expr "(u[1]-u[2])/xl1"
}
Block {
BlockType Fcn
Name "Fcn5"
Position [465, 330, 560, 360]
Expr "(u[1]-u[2])/xpl2"
}
Block {
BlockType Lookup
Name "Look-Up\nTable"
Position [550, 258, 610, 292]
Orientation left
InputValues "psisat"
OutputValues "Dpsi"
}
Block {
BlockType Memory
Name "Memory"
Position [480, 263, 505, 287]
Orientation left
X0 "0"
InheritSampleTime off
}
Block {
BlockType Mux
Name "Mux"
Position [75, 108, 95, 192]
Inputs "3"
}
Block {
BlockType Mux
Name "Mux1"
Position [80, 292, 100, 368]
Inputs "3"
}
Block {
BlockType Mux
Name "Mux2"
Position [415, 316, 435, 369]
Inputs "2"
}
Block {
BlockType Mux
Name "Mux3"
Position [405, 193, 420, 257]
Inputs "3"
}
Block {
BlockType Mux
Name "Mux4"
Position [425, 114, 445, 161]
Inputs "2"
}
Block {
BlockType Integrator
Name "psi1_"
Position [310, 137, 340, 163]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psi1o"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "psi2'_"
Position [320, 317, 350, 343]
ExternalReset none
InitialConditionSource internal
InitialCondition "Psip2o"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Outport
Name "out_psi1"
Position [710, 65, 730, 85]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "out_psim"
Position [710, 215, 730, 235]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "out_i1"
Position [710, 130, 730, 150]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "out_i2'"
Position [710, 335, 730, 355]
Port "4"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "Look-Up\nTable"
SrcPort 1
DstBlock "Memory"
DstPort 1
}
Line {
SrcBlock "Memory"
SrcPort 1
Points [-90, 0; 0, -30]
DstBlock "Mux3"
DstPort 3
}
Line {
SrcBlock "Fcn3"
SrcPort 1
Points [0, 0]
Branch {
Points [50, 0; 0, 50]
DstBlock "Look-Up\nTable"
DstPort 1
}
Branch {
Points [50, 0; 0, 165; -285, 0; 0, -35]
DstBlock "Mux2"
DstPort 2
}
Branch {
Points [50, 0; 0, -135; -615, 0; 0, 30]
DstBlock "Mux"
DstPort 1
}
Branch {
Points [50, 0; 0, 165; -620, 0; 0, -35]
DstBlock "Mux1"
DstPort 3
}
Branch {
Points [50, 0; 0, -45; -270, 0; 0, -30]
DstBlock "Mux4"
DstPort 2
}
Branch {
DstBlock "out_psim"
DstPort 1
}
}
Line {
SrcBlock "Mux2"
SrcPort 1
DstBlock "Fcn5"
DstPort 1
}
Line {
SrcBlock "psi2'_"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "Mux2"
DstPort 1
}
Branch {
Points [25, 0; 0, -105]
DstBlock "Mux3"
DstPort 2
}
Branch {
Points [25, 0; 0, -45; -320, 0; 0, 20]
DstBlock "Mux1"
DstPort 1
}
}
Line {
SrcBlock "Mux1"
SrcPort 1
DstBlock "Fcn2"
DstPort 1
}
Line {
SrcBlock "psi1_"
SrcPort 1
Points [0, 0]
Branch {
Points [35, 0; 0, 55; -325, 0; 0, -25]
DstBlock "Mux"
DstPort 3
}
Branch {
Points [35, 0; 0, -25]
DstBlock "Mux4"
DstPort 1
}
Branch {
Points [35, 0; 0, 55]
DstBlock "Mux3"
DstPort 1
}
Branch {
Points [35, 0; 0, -75]
DstBlock "out_psi1"
DstPort 1
}
}
Line {
SrcBlock "Mux4"
SrcPort 1
DstBlock "Fcn4"
DstPort 1
}
Line {
SrcBlock "Mux3"
SrcPort 1
DstBlock "Fcn3"
DstPort 1
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "psi2'_"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "psi1_"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fcn"
DstPort 1
}
Line {
SrcBlock "Fcn4"
SrcPort 1
DstBlock "out_i1"
DstPort 1
}
Line {
SrcBlock "in_1"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "in_2"
SrcPort 1
DstBlock "Mux1"
DstPort 2
}
Line {
SrcBlock "Fcn5"
SrcPort 1
DstBlock "out_i2'"
DstPort 1
}
Annotation {
Position [577, 329]
VerticalAlignment top
Text "i2'"
}
Annotation {
Position [452, 264]
VerticalAlignment top
Text "Dpsi"
}
Annotation {
Position [642, 207]
VerticalAlignment top
Text "psim"
}
Annotation {
Position [362, 313]
VerticalAlignment top
Text "psi2'"
}
Annotation {
Position [357, 132]
VerticalAlignment top
Text "psi1"
}
Annotation {
Position [577, 127]
VerticalAlignment top
Text "i1"
}
}
}
Block {
BlockType Clock
Name "Clock"
Position [105, 82, 120, 98]
DeleteFcn "simclock BlockIsBeingDestroyed"
PostSaveFcn "simclock Save"
Location [30, 40, 140, 75]
}
Block {
BlockType SubSystem
Name "m4"
Position [429, 364, 497, 407]
DropShadow on
OpenFcn "m4"
ShowPortLabels off
MaskType "Masked block of m4.m"
MaskHelp "Uses m4.m to initialize and plot"
MaskDisplay "disp('Initialize\\nand plot')"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate off
MaskIconUnits autoscale
System {
Name "m4"
Location [480, 32767, 795, 32767]
Open off
ScreenColor white
Annotation {
Position [167, 49]
VerticalAlignment top
Text "Masked block of m4.m to initilaize s4.m\nand"
" plot results of simulation"
}
}
}
Block {
BlockType Mux
Name "Mux"
Position [121, 60, 519, 75]
Orientation up
Inputs "8"
}
Block {
BlockType Gain
Name "R_n(Np/Ns)"
Position [475, 291, 510, 329]
Gain "Rn*NpbyNs"
}
Block {
BlockType SubSystem
Name "Ref_Load an_"
Position [265, 200, 290, 240]
Orientation left
ShowPortLabels off
System {
Name "Ref_Load an_"
Location [64, 100, 294, 227]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_1"
Position [180, 55, 200, 75]
Orientation left
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Gain
Name "HGR"
Position [100, 51, 140, 79]
Orientation left
Gain "-24"
}
Block {
BlockType Outport
Name "out_1"
Position [15, 55, 35, 75]
Orientation left
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "HGR"
SrcPort 1
DstBlock "out_1"
DstPort 1
}
Line {
SrcBlock "in_1"
SrcPort 1
DstBlock "HGR"
DstPort 1
}
}
}
Block {
BlockType SubSystem
Name "Ref_Load bn"
Position [260, 335, 285, 375]
Orientation left
ShowPortLabels off
System {
Name "Ref_Load bn"
Location [64, 196, 294, 332]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_1"
Position [180, 55, 200, 75]
Orientation left
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Gain
Name "HGR"
Position [100, 55, 120, 75]
Orientation left
Gain "-24"
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -