📄 s2.mdl
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Block {
BlockType Gain
Name "Gain"
Position [330, 100, 370, 130]
Gain "1/Ls"
}
Block {
BlockType Ground
Name "Grd"
Position [200, 194, 210, 206]
Orientation left
}
Block {
BlockType Ground
Name "Grd1"
Position [165, 244, 175, 256]
Orientation left
}
Block {
BlockType Ground
Name "Grd2"
Position [430, 139, 440, 151]
}
Block {
BlockType Ground
Name "Grd3"
Position [495, 80, 505, 90]
}
Block {
BlockType Ground
Name "Grd5"
Position [530, 195, 540, 205]
Orientation up
}
Block {
BlockType HitCross
Name "Hit \nCrossing"
Position [590, 448, 615, 472]
Orientation left
HitCrossingOffset "1e-12"
HitCrossingDirection either
ShowOutputPort on
}
Block {
BlockType Switch
Name "IS*Rcb insert"
Position [540, 46, 555, 94]
Threshold "0.5"
}
Block {
BlockType Switch
Name "Insert iS*Rc"
Position [145, 164, 165, 206]
Orientation left
Threshold "0.5"
}
Block {
BlockType Switch
Name "Insert iS*Ro"
Position [85, 211, 105, 259]
Orientation left
Threshold "0.5"
}
Block {
BlockType Logic
Name "Logical\nOperator4"
Position [125, 370, 165, 395]
Orientation up
Operator XOR
Inputs "2"
}
Block {
BlockType Logic
Name "NOT CB on/off"
Position [285, 336, 305, 354]
Operator NOT
Inputs "1"
}
Block {
BlockType Gain
Name "Rc"
Position [255, 155, 300, 185]
Orientation left
Gain "Rc"
}
Block {
BlockType ResetIntegrator
Name "Reset\nIntegrator"
Position [550, 123, 575, 157]
InitialCondition "0"
}
Block {
BlockType Gain
Name "Ro"
Position [315, 205, 355, 235]
Orientation left
Gain "Ro"
}
Block {
BlockType Switch
Name "Switch"
Position [485, 107, 500, 153]
Threshold "0.5"
}
Block {
BlockType Terminator
Name "T"
Position [420, 278, 430, 292]
}
Block {
BlockType Terminator
Name "T1"
Position [340, 395, 350, 405]
}
Block {
BlockType Terminator
Name "T2"
Position [395, 444, 405, 456]
Orientation left
}
Block {
BlockType Terminator
Name "T3"
Position [220, 469, 230, 481]
Orientation left
}
Block {
BlockType Sum
Name "Vbreaker"
Position [605, 23, 625, 87]
Inputs "+-"
}
Block {
BlockType SubSystem
Name "delay tc"
Position [200, 300, 250, 320]
Orientation up
NamePlacement alternate
ShowPortLabels off
System {
Name "delay tc"
Location [100, 171, 607, 410]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_1"
Position [20, 90, 40, 110]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Logic
Name "Logical\nOperator"
Position [225, 85, 275, 145]
Operator XOR
Inputs "2"
}
Block {
BlockType Logic
Name "Logical\nOperator1"
Position [320, 42, 365, 138]
Operator AND
Inputs "2"
}
Block {
BlockType TransportDelay
Name "Transport\nDelay1"
Position [105, 110, 170, 150]
DelayTime "tc"
InitialInput "0"
BufferSize "20000"
}
Block {
BlockType Outport
Name "out_1"
Position [405, 80, 425, 100]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "Transport\nDelay1"
SrcPort 1
DstBlock "Logical\nOperator"
DstPort 2
}
Line {
SrcBlock "in_1"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "Logical\nOperator"
DstPort 1
}
Branch {
Points [15, 0]
Branch {
Points [0, 30]
DstBlock "Transport\nDelay1"
DstPort 1
}
Branch {
Points [0, -35]
DstBlock "Logical\nOperator1"
DstPort 1
}
}
}
Line {
SrcBlock "Logical\nOperator1"
SrcPort 1
DstBlock "out_1"
DstPort 1
}
Line {
SrcBlock "Logical\nOperator"
SrcPort 1
DstBlock "Logical\nOperator1"
DstPort 2
}
Annotation {
Position [352, 185]
VerticalAlignment top
Text "AND used to suppress\nspurious operatio"
"n when\ninput goes from high to low"
}
}
}
Block {
BlockType TransportDelay
Name "delay to"
Position [315, 443, 360, 467]
Orientation left
DelayTime "to"
InitialInput "0"
BufferSize "20000"
}
Block {
BlockType Sum
Name "e-vS"
Position [90, 14, 105, 61]
Inputs "+-"
}
Block {
BlockType Sum
Name "e-vS-iS*Rcb"
Position [150, 92, 165, 138]
Inputs "+--"
}
Block {
BlockType SubSystem
Name "latch"
Position [280, 377, 310, 408]
ShowPortLabels on
System {
Name "latch"
Location [519, 396, 821, 598]
Open off
ScreenColor white
Block {
BlockType Inport
Name "S"
Position [25, 105, 45, 125]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "R"
Position [25, 145, 45, 165]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Demux
Name "Demux"
Position [175, 66, 180, 159]
Outputs "2"
}
Block {
BlockType CombinatorialLogic
Name "Logic"
Position [115, 99, 145, 131]
TruthTable "[0 1;0 1;1 0;0 1;1 0;0 1;1 0;1 0]"
}
Block {
BlockType Memory
Name "Memory"
Position [115, 25, 155, 55]
Orientation left
X0 "0"
InheritSampleTime on
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate off
MaskIconUnits autoscale
}
Block {
BlockType Mux
Name "Mux"
Position [90, 54, 95, 176]
Inputs "3"
}
Block {
BlockType Outport
Name "Q"
Position [255, 80, 275, 100]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "!Q"
Position [255, 125, 275, 145]
Port "2"
OutputWhenDisabled held
InitialOutput "1"
}
Line {
SrcBlock "R"
SrcPort 1
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "S"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "Memory"
SrcPort 1
Points [-50, 0; 0, 35]
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 1
Points [25, 0]
Branch {
Points [0, -50]
DstBlock "Memory"
DstPort 1
}
Branch {
DstBlock "Q"
DstPort 1
}
}
Line {
SrcBlock "Demux"
SrcPort 2
DstBlock "!Q"
DstPort 1
}
Line {
SrcBlock "Logic"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Logic"
DstPort 1
}
}
}
Block {
BlockType SubSystem
Name "latch1"
Position [425, 419, 455, 461]
Orientation left
ShowPortLabels on
System {
Name "latch1"
Location [519, 396, 821, 598]
Open off
ScreenColor white
Block {
BlockType Inport
Name "S"
Position [25, 105, 45, 125]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "R"
Position [25, 145, 45, 165]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Demux
Name "Demux"
Position [175, 66, 180, 159]
Outputs "2"
}
Block {
BlockType CombinatorialLogic
Name "Logic"
Position [115, 99, 145, 131]
TruthTable "[0 1;0 1;1 0;0 1;1 0;0 1;1 0;1 0]"
}
Block {
BlockType Memory
Name "Memory"
Position [115, 25, 155, 55]
Orientation left
X0 "0"
InheritSampleTime on
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate off
MaskIconUnits autoscale
}
Block {
BlockType Mux
Name "Mux"
Position [90, 54, 95, 176]
Inputs "3"
}
Block {
BlockType Outport
Name "Q"
Position [255, 80, 275, 100]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "!Q"
Position [255, 125, 275, 145]
Port "2"
OutputWhenDisabled held
InitialOutput "1"
}
Line {
SrcBlock "R"
SrcPort 1
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "S"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "Memory"
SrcPort 1
Points [-50, 0; 0, 35]
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 1
Points [25, 0]
Branch {
Points [0, -50]
DstBlock "Memory"
DstPort 1
}
Branch {
DstBlock "Q"
DstPort 1
}
}
Line {
SrcBlock "Demux"
SrcPort 2
DstBlock "!Q"
DstPort 1
}
Line {
SrcBlock "Logic"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Logic"
DstPort 1
}
}
}
Block {
BlockType Logic
Name "open\nM at next\niS zero"
Position [523, 375, 567, 385]
Orientation down
Operator AND
Inputs "3"
}
Block {
BlockType Outport
Name "iS"
Position [650, 130, 670, 150]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "vb"
Position [655, 45, 675, 65]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "latch"
SrcPort 1
Points [0, 0]
Branch {
Points [155, 0; 0, -315]
DstBlock "IS*Rcb insert"
DstPort 2
}
Branch {
Points [145, 0; 0, -255]
DstBlock "Switch"
DstPort 2
}
}
Line {
SrcBlock "latch"
SrcPort 2
DstBlock "T1"
DstPort 1
}
Line {
SrcBlock "Ro"
SrcPort 1
DstBlock "Insert iS*Ro"
DstPort 1
}
Line {
SrcBlock "e-vS-iS*Rcb"
SrcPort 1
Points [0, 0]
Branch {
Points [30, 0; 0, -60]
DstBlock "IS*Rcb insert"
DstPort 1
}
Branch {
DstBlock "Gain"
DstPort 1
}
}
Line {
SrcBlock "Gain"
SrcPort 1
DstBlock "Switch"
DstPort 1
}
Line {
SrcBlock "Rc"
SrcPort 1
DstBlock "Insert iS*Rc"
DstPort 1
}
Line {
SrcBlock "Insert iS*Ro"
SrcPort 1
Points [-15, 0; 0, -120]
DstBlock "e-vS-iS*Rcb"
DstPort 2
}
Line {
SrcBlock "Insert iS*Rc"
SrcPort 1
Points [-45, 0; 0, -55]
DstBlock "e-vS-iS*Rcb"
DstPort 3
}
Line {
SrcBlock "CB on/off\nsignal"
SrcPort 1
Points [20, 0]
Branch {
DstBlock "NOT CB on/off"
DstPort 1
}
Branch {
Points [-5, 0]
Branch {
Points [160, 0]
Branch {
DstBlock "delay tc"
DstPort 1
}
Branch {
Points [0, 40]
DstBlock "latch"
DstPort 1
}
}
Branch {
Points [0, 155; 410, 0; 0, -50]
DstBlock "latch1"
DstPort 2
}
}
}
Line {
SrcBlock "delay tc"
SrcPort 1
Points [0, 0]
Branch {
Points [0, -30; 95, 0]
Branch {
Points [0, 20]
DstBlock "D Latch"
DstPort 2
}
Branch {
DstBlock "D Latch"
DstPort 1
}
}
Branch {
Points [0, -110]
DstBlock "Insert iS*Rc"
DstPort 2
}
}
Line {
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