📄 dy.mdl
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OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: auto"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Integrator
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
IgnoreLimit off
ZeroCross on
ContinuousStateAttributes "''"
}
Block {
BlockType Memory
X0 "0"
InheritSampleTime off
LinearizeMemory off
LinearizeAsDelay off
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: auto"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Scope
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "-1"
}
Block {
BlockType SubSystem
ShowPortLabels "FromPortIcon"
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
CheckFcnCallInpInsideContextMsg off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
CollapseMode "All dimensions"
CollapseDim "1"
InputSameDT on
AccumDataTypeStr "Inherit: Inherit via internal rule"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as first input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as first input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType ToWorkspace
VariableName "simulink_output"
MaxDataPoints "1000"
Decimation "1"
SampleTime "0"
FixptAsFi off
}
Block {
BlockType Terminator
}
Block {
BlockType Lookup
InputValues "[-4:5]"
Table " rand(1,10)-0.5"
LookUpMeth "Interpolation-Extrapolation"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
OutDataTypeStr "Inherit: Same as input"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
LUTDesignTableMode "Redesign Table"
LUTDesignDataSource "Block Dialog"
LUTDesignFunctionName "sqrt(x)"
LUTDesignUseExistingBP on
LUTDesignRelError "0.01"
LUTDesignAbsError "1e-6"
}
Block {
BlockType Sin
SineType "Time based"
TimeSource "Use simulation time"
Amplitude "1"
Bias "0"
Frequency "1"
Phase "0"
Samples "10"
Offset "0"
SampleTime "-1"
VectorParams1D on
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "DY"
Location [2, 78, 1022, 718]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Gain
Name "(Np/Ns)"
Position [405, 214, 430, 246]
Gain "NpbyNs"
}
Block {
BlockType Gain
Name "(Np/Ns)/3"
Position [498, 280, 532, 310]
Orientation "up"
Gain "NpbyNs/3"
}
Block {
BlockType Gain
Name "(Ns/Np)"
Position [210, 156, 235, 184]
Gain "1/NpbyNs"
}
Block {
BlockType Gain
Name "1/3"
Position [463, 225, 497, 260]
Orientation "up"
Gain "1/3"
}
Block {
BlockType SubSystem
Name "ABan_unit"
Ports [2, 4]
Position [255, 190, 285, 240]
ShowPortLabels "none"
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "ABan_unit"
Location [11, 82, 815, 501]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "in_1"
Position [25, 140, 45, 160]
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "in_2"
Position [30, 320, 50, 340]
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Fcn
Name "Fcn"
Position [120, 135, 285, 165]
Expr "wb*(u[2]-(r1/xl1)*(u[3]-u[1]))"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [120, 314, 300, 346]
Expr "wb*(u[2] -(rp2/xpl2)*(u[1]-u[3]))"
}
Block {
BlockType Fcn
Name "Fcn3"
Position [440, 206, 615, 244]
Expr "xM*(u[1]/xl1+u[2]/xpl2-u[3]/xm)"
}
Block {
BlockType Fcn
Name "Fcn4"
Position [470, 126, 560, 154]
Expr "(u[1]-u[2])/xl1"
}
Block {
BlockType Fcn
Name "Fcn5"
Position [465, 330, 560, 360]
Expr "(u[1]-u[2])/xpl2"
}
Block {
BlockType Lookup
Name "Look-Up\nTable"
Position [550, 258, 610, 292]
Orientation "left"
InputValues "psisat"
Table "Dpsi"
}
Block {
BlockType Memory
Name "Memory"
Position [480, 263, 505, 287]
Orientation "left"
}
Block {
BlockType Mux
Name "Mux"
Ports [3, 1]
Position [75, 108, 95, 192]
Inputs "3"
}
Block {
BlockType Mux
Name "Mux1"
Ports [3, 1]
Position [80, 292, 100, 368]
Inputs "3"
}
Block {
BlockType Mux
Name "Mux2"
Ports [2, 1]
Position [415, 316, 435, 369]
Inputs "2"
}
Block {
BlockType Mux
Name "Mux3"
Ports [3, 1]
Position [405, 193, 420, 257]
Inputs "3"
}
Block {
BlockType Mux
Name "Mux4"
Ports [2, 1]
Position [425, 114, 445, 161]
Inputs "2"
}
Block {
BlockType Integrator
Name "psi1_"
Ports [1, 1]
Position [310, 137, 340, 163]
InitialCondition "Psi1o"
}
Block {
BlockType Integrator
Name "psi2'_"
Ports [1, 1]
Position [320, 317, 350, 343]
InitialCondition "Psip2o"
}
Block {
BlockType Outport
Name "out_psi1"
Position [710, 65, 730, 85]
IconDisplay "Port number"
InitialOutput "0"
}
Block {
BlockType Outport
Name "out_psim"
Position [710, 215, 730, 235]
Port "2"
IconDisplay "Port number"
InitialOutput "0"
}
Block {
BlockType Outport
Name "out_i1"
Position [710, 130, 730, 150]
Port "3"
IconDisplay "Port number"
InitialOutput "0"
}
Block {
BlockType Outport
Name "out_i2'"
Position [710, 335, 730, 355]
Port "4"
IconDisplay "Port number"
InitialOutput "0"
}
Line {
SrcBlock "Look-Up\nTable"
SrcPort 1
DstBlock "Memory"
DstPort 1
}
Line {
SrcBlock "Memory"
SrcPort 1
Points [-90, 0; 0, -30]
DstBlock "Mux3"
DstPort 3
}
Line {
SrcBlock "Fcn3"
SrcPort 1
Points [0, 0]
Branch {
Points [50, 0; 0, 50]
DstBlock "Look-Up\nTable"
DstPort 1
}
Branch {
Points [50, 0; 0, 165; -285, 0; 0, -35]
DstBlock "Mux2"
DstPort 2
}
Branch {
Points [50, 0; 0, -135; -615, 0; 0, 30]
DstBlock "Mux"
DstPort 1
}
Branch {
Points [50, 0; 0, 165; -620, 0; 0, -35]
DstBlock "Mux1"
DstPort 3
}
Branch {
Points [50, 0; 0, -45; -270, 0; 0, -30]
DstBlock "Mux4"
DstPort 2
}
Branch {
DstBlock "out_psim"
DstPort 1
}
}
Line {
SrcBlock "Mux2"
SrcPort 1
DstBlock "Fcn5"
DstPort 1
}
Line {
SrcBlock "psi2'_"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "Mux2"
DstPort 1
}
Branch {
Points [25, 0; 0, -105]
DstBlock "Mux3"
DstPort 2
}
Branch {
Points [25, 0; 0, -45; -320, 0; 0, 20]
DstBlock "Mux1"
DstPort 1
}
}
Line {
SrcBlock "Mux1"
SrcPort 1
DstBlock "Fcn2"
DstPort 1
}
Line {
SrcBlock "psi1_"
SrcPort 1
Points [0, 0]
Branch {
Points [35, 0; 0, 55; -325, 0; 0, -25]
DstBlock "Mux"
DstPort 3
}
Branch {
Points [35, 0; 0, -25]
DstBlock "Mux4"
DstPort 1
}
Branch {
Points [35, 0; 0, 55]
DstBlock "Mux3"
DstPort 1
}
Branch {
Points [35, 0; 0, -75]
DstBlock "out_psi1"
DstPort 1
}
}
Line {
SrcBlock "Mux4"
SrcPort 1
DstBlock "Fcn4"
DstPort 1
}
Line {
SrcBlock "Mux3"
SrcPort 1
DstBlock "Fcn3"
DstPort 1
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "psi2'_"
DstPort 1
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "psi1_"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fcn"
DstPort 1
}
Line {
SrcBlock "Fcn4"
SrcPort 1
DstBlock "out_i1"
DstPort 1
}
Line {
SrcBlock "in_1"
SrcPort 1
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "in_2"
SrcPort 1
DstBlock "Mux1"
DstPort 2
}
Line {
SrcBlock "Fcn5"
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