📄 t118.asm

📁 T118B小尺寸TFT屏显示驱动芯片代码。
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		%DelayTimer		#10

		lda		#$3f
		sta		T2
		lda		#$00
		sta		T3
		jsr		Set_P4_TVData

		jmp		SetIPVideoType
		rts

SetIPVideoType:		
		lda		m_cChroma
		cmp		#S_NTSC
		bne		SetIP_PAL_VideoType
SetIP_NTSC_VideoType:
		;;m_wVTotal=525;
		lda		#$00
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		and		#$01
		sta		T3
		jsr		Set_P4_TVData

		lda		#$01
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		ora		#09
		sta		T3
		jsr		Set_P4_TVData

		lda		m_cSource
		beq		SetIP_NTSC_CVBS
SetIP_NTSC_SVideo:
		lda		#$03
		sta		T2
		lda		#$03
		sta		T3
		jsr		Set_P4_TVData
		Jmp		SetIPVideoType_End

SetIP_NTSC_CVBS:
		lda		#$03
		sta		T2
		lda		#$00
		sta		T3
		jsr		Set_P4_TVData
		Jmp		SetIPVideoType_End

SetIP_PAL_VideoType:

		;;m_wVTotal=625;
		lda		#$00
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		and		#$01
		ora		#$32
		sta		T3
		jsr		Set_P4_TVData

		lda		#$01
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		ora		#$08
		sta		T3
		jsr		Set_P4_TVData

		lda		#$03
		sta		T2
		lda		#$04
		sta		T3
		jsr		Set_P4_TVData

SetIPVideoType_End:
		%Save_TV_P2		#$3f,#$01				;;From xiaohui peng
		%DelayTimer		#04                     ;;From xiaohui peng
		%Save_TV_P2		#$3f,#$00				;;From xiaohui peng
		rts

SourceSelect:
		lda		#$C2
		sta		T2
		jsr		Get_P0_TVData
		lda		T1
		ora		#(PSYNC_STR+IGNORE_VSYNC)
		sta		T3
		jsr		Set_P0_TVData

		%TW101_I2CWrite		#$9d,#$10
		%TW101_I2CWrite		#$9e,#$ff
		%TW101_I2CWrite		#$9f,#$40
		%TW101_I2CWrite		#PATTERN_CTRL,#$87

		%TW101_I2CWrite		#$0f,#$70				;;Tiger
		%DelayTimer		#04							;;Tiger
		%TW101_I2CWrite		#$0f,#$00				;;Tiger

		%TW101_I2CWrite		#$31,#$00
		%TW101_I2CWrite		#$1a,#$c7

		lda		m_cSource
		bne		Is_SVideo_SourceSelect
		Jmp		Is_CVBS_SourceSelect
Is_SVideo_SourceSelect:
		%TW101_I2CWrite		#$0f,#$70				;;Tiger
		%DelayTimer		#04							;;Tiger

		%TW101_I2CWrite		#$18,#$05
		%TW101_I2CWrite		#$19,#$0e

		%TW101_I2CWrite		#$11,#$1d

 		lda		#$07
		sta		T2
		lda		#$25
		sta		T3
		jsr		Set_P4_TVData

		lda		#$00
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		ora		#$01
		sta		T3
		jsr		Set_P4_TVData

		lda		#$01
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		and		#~(ENYPbPr)
		sta		T3
		jsr		Set_P4_TVData

		lda		#$03
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		ora		#$03
		sta		T3

 		lda		m_cStandard
		cmp		#S_PAL
		bne		Is_SVideo_SourceSelect_2

		lda		T3
		ora		#$04
		sta		T3
Is_SVideo_SourceSelect_2:
		jsr		Set_P4_TVData

		Jmp		SourceSelect_End		
  
Is_CVBS_SourceSelect:
		%TW101_I2CWrite		#$0f,#$70				;;Tiger
		%DelayTimer		#04							;;Tiger

		%TW101_I2CWrite		#$18,#$00
		%TW101_I2CWrite		#$19,#$0c
		
		%TW101_I2CWrite		#$C2,#$00
		%TW101_I2CWrite		#$11,#$0c

		lda		#$07
		sta		T2
		lda		#$22
		sta		T3
		jsr		Set_P4_TVData

		lda		#$00
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		and		#$fe
		sta		T3
		jsr		Set_P4_TVData

		lda		#$01
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		and		#~(ENYPbPr)
		sta		T3
		jsr		Set_P4_TVData

		lda		#$03
		sta		T2
		jsr		Get_P4_TVData
		lda		T1
		and		#$fc
		sta		T3
		jsr		Set_P4_TVData

SourceSelect_End:
		%DelayTimer		#30

;;		lda		#$3a
;;		sta		T2
;;		jsr		Get_P4_TVData
;;		lda		T1
;;		and		#$06
;;		cmp		#$06
;;		bne		SourceSelect_End_2

		lda		#$C2
		sta		T2
		jsr		Get_P0_TVData
		lda		T1
		and		#~(PSYNC_STR+IGNORE_VSYNC)
		sta		T3
		jsr		Set_P0_TVData

;;		lda		#PATTERN_CTRL
;;		sta		T2
;;		jsr		Get_P0_TVData
;;		lda		T1
;;		and		#~($80)
;;		sta		T3
;;		jsr		Set_P0_TVData

		%TW101_I2CWrite		#PATTERN_CTRL,#$00
;;		%TW101_I2CWrite		#$11,#$0c

SourceSelect_End_2:
		%TW101_I2CWrite		#$e2,#$11

		%TW101_I2CWrite		#$0f,#$00   //BY TIGER O822  OPEN ADC POWER
		%Save_TV_P2			#$3f,#$01  //BY TIGER O822  RESET P2-3F REGISTER
		%DelayTimer			#04
		%Save_TV_P2			#$3f,#$00   //BY TIGER O822  RESET P2-3F REGISTER   
		rts

ClosePanel:
		lda		m_bPanelClose
		bne		ClosePanel_End

		inc		m_bPanelClose		

		lda		#$C2
		sta		T2
		jsr		Get_P0_TVData
		lda		T1
		ora		#(PSYNC_STR+IGNORE_VSYNC)
		sta		T3
		jsr		Set_P0_TVData

		%TW101_I2CWrite		#$9d,#$00
		%TW101_I2CWrite		#$9e,#$40
		%TW101_I2CWrite		#$9f,#$8a
		%TW101_I2CWrite		#PATTERN_CTRL,#$87
		%TW101_I2CWrite		#$e2,#$11

ClosePanel_End:
		rts

OpenPanel:
		lda		m_bPanelClose
		beq		OpenPanel_End
		
		lda		#0
		sta		m_bPanelClose		
		
		lda		#$C2
		sta		T2
		jsr		Get_P0_TVData
		lda		T1
		and		#~(PSYNC_STR+IGNORE_VSYNC)
		sta		T3
		jsr		Set_P0_TVData

		lda		#PATTERN_CTRL
		sta		T2
		jsr		Get_P0_TVData
		lda		T1
		and		#~($80)
		sta		T3
		jsr		Set_P0_TVData

OpenPanel_End:
		rts

TconInit:
		%Load_P1_Tbl	TconP1Adr,TconP1Data,(TconP1Adr_End-TconP1Adr)
		rts

LoadTbl_P0:
		sta		TVP5150_Ptr
		ldy		#0
LoadTbl_P0_Lp:
		lda		(T5),y
		sta		T2
		lda		(T7),y
		sta		T3
		jsr		Set_P0_TVData
		iny
		cpy		TVP5150_Ptr
		bne		LoadTbl_P0_Lp
		rts

LoadTbl_P1:
		sta		TVP5150_Ptr
		ldy		#0
LoadTbl_P1_Lp:
		lda		(T5),y
		sta		T2
		lda		(T7),y
		sta		T3
		jsr		Set_P2_TVData
		iny
		cpy		TVP5150_Ptr
		bne		LoadTbl_P1_Lp
		rts

LoadTbl_P2:
		sta		TVP5150_Ptr
		ldy		#0
LoadTbl_P2_Lp:
		lda		(T5),y
		sta		T2
		lda		(T7),y
		sta		T3
		jsr		Set_P4_TVData
		iny
		cpy		TVP5150_Ptr
		bne		LoadTbl_P2_Lp
		rts

stInitT10xP0_Adr:
	db	$00,$01,$02,$0A,$0B,$0C,$1a,$0D			;;08-27-07
	db	$CA,$c2,$60,$1c,$61,$62,$63,$64			;;08-27-07
	db	$66,$97,$98,$0D,$E0,$11,$18,$19			;;08-27-07
	db	$91,$C8,$C9,$ca,$cb,$C1,$DC,$DD			;;08-27-07
	db	$DE,$DF,$B0,$B1,$B2,$B3,$B4,$B5			;;08-27-07
	db	$B6,$B7,$B8,$B9,$BA,$BB,$BC,$BD			;;08-27-07
	db	$BE,$BF,$72,$73,$74,$75,$e2,$84			;;08-27-07
	db	$85,$E1,$50,$38,$39,$3A,$3B,$E0			;;08-27-07
	db	$e1,$9C,$90,$30,$90,$ea        			;;08-27-07
	db	$04                            			;;08-27-07
;;	db	$00,$01,$02,$0A,$0B,$0C,$1a,$CA,
;;	db	$c2,$60,$1c,$61,$62,$63,$64,$66,
;;	db	$97,$98,$0D,$E0,$11,$18,$19,$91,
;;	db	$C8,$C9,$ca,$cb,$C1,$DC,$DD,$DE,
;;	db	$DF,$B0,$B1,$B2,$B3,$B4,$B5,$B6,
;;	db	$B7,$B8,$B9,$BA,$BB,$BC,$BD,$BE,
;;	db	$BF,$72,$73,$74,$75,$e2,$84,$85,
;;	db	$E1,$50,$38,$39,$3A,$3B,$E0,$e1,
;;	db	$9C,$90,$30,$90,$ea
;;	db	$04
stInitT10xP0_Adr_End:

stInitT10xP0_Dat:
	db	$00,$00,$00,$30,$60,$80,$C3,$30			;;08-27-07
	db	$03,$00,$01,$c0,$88,$18,$08,$04			;;08-27-07
	db	$88,$93,$CC,$30,$90,$1d,$00,$07			;;08-27-07
	db	$00,$0f,$02,$02,$48,$c8,$40,$01			;;08-27-07
	db	$ea,$00,$14,$00,$0d,$00,$40,$01			;;08-27-07
	db	$ea,$00,$a2,$01,$0c,$01,$0a,$00			;;08-27-07
	db	$03,$00,$33,$73,$4a,$40,$11,$00			;;08-27-07
	db	$10,$a0,$10,$50,$00,$20,$03,$90			;;08-27-07
	db	$60,$02,$04,$00,$04,$01        			;;08-27-07
	db	$2f                            			;;08-27-07
;;	db	$00,$00,$00,$30,$60,$00,$c3,$02
;;	db	$00,$01,$c0,$88,$18,$08,$04,$88
;;	db	$93,$cc,$20,$90,$0c,$00,$0c,$07
;;	db	$39,$02,$02,$48,$88,$40,$01,$ea
;;	db	$00,$34,$00,$14,$00,$40,$01,$ea
;;	db	$00,$87,$01,$0c,$01,$0a,$00,$03
;;	db	$00,$99,$45,$00,$20,$00,$68,$0c
;;	db	$60,$30,$50,$00,$20,$03,$90,$60
;;	db	$02,$04,$82,$04,$01
;;	db	$2f


stInitT10xP2_Adr:
	db	$3f,$24,$25,$2E,$2F,$3F,$c0,$e0			;;08-27-07
	db	$0C,$18,$19,$1A,$1B,$30,$31,$82			;;08-27-07
	db	$04,$10,$02,$11,$01,$08,$09,$80			;;08-27-07
	db	$2d,$3f                        			;;08-27-07
stInitT10xP2_Adr_End:

stInitT10xP2_Dat:
	db	$00,$e9,$0F,$82,$30,$00,$14,$10			;;08-27-07
	db	$67,$21,$f0,$7c,$0f,$24,$61,$42			;;08-27-07
	db	$DD,$27,$cb,$b9,$00,$70,$28,$05			;;08-27-07
	db	$48,$01                        			;;08-27-07
;;	db	$00,$e9,$0f,$82,$50,$00,$00,$00
;;	db	$a5,$21,$f0,$7c,$0f,$22,$61,$42
;;	db	$dd,$27,$cb,$b9,$09,$60,$08,$05
;;	db	$48,$00

ucaPanelSpecAdrP0:
	db	$79,$c7,$65,$66			;;08-27-07
ucaPanelSpecAdrP0_End:

ucaPanelSpecDataP0:
	db	$00,$00,$08,$88			;;08-27-07

ucaPanelSpecAdrP2:
	db	$08,$09,$0a				;;08-27-07
ucaPanelSpecAdrP2_End:

ucaPanelSpecDataP2:
	db	$60,$08,$80				;;08-27-07

ucaZoomAdrP0:
	db	$40,$70,$72,$73,$74,$75,$76,$77			;;08-27-07
	db	$84,$85,$88,$89,$8a,$8b,$c0,$c7			;;08-27-07
	db	$c8,$b0,$b2,$b6,$b8,$b9,$bc,$be			;;08-27-07
	db	$d8,$d9,$da,$db,$dc,$dd,$de,$df			;;08-27-07
	db	$30,$79                        			;;08-27-07
;;	db	$40,$70,$72,$73,$74,$75,$76,$77
;;	db	$84,$85,$88,$89,$8a,$8b,$c8,$b4  
;;	db	$b5,$b8,$b9,$b0,$b2,$b6,$b8,$be
;;	db	$d8,$d9,$da,$db,$dc,$dd,$de,$df
;;	db	$30,$79,$c0,$c5,$c7,$cb,$e2			;;do
ucaZoomAdrP0_End:

ucaZoomDataP0_NTSC:
	db	$15,$b0,$99,$45,$00,$20,$00,$00			;;08-27-07
	db	$68,$0C,$00,$00,$00,$00,$20,$00			;;08-27-07
	db	$39,$34,$14,$EF,$87,$01,$0A,$03			;;08-27-07
	db	$00,$00,$00,$00,$40,$01,$EF,$00			;;08-27-07
	db	$82,$00                        			;;08-27-07
;;	db	$15,$b0,$99,$45,$00,$20,$00,$00
;;	db	$68,$0c,$00,$00,$00,$00,$39,$40
;;	db	$01,$87,$01,$34,$14,$ea,$87,$03
;;	db	$00,$00,$00,$00,$40,$01,$ea,$00
;;	db	$82,$00,$20,$00,$00,$48,$00

ucaZoomDataP0_PAL:
	db	$10,$B0,$99,$45,$00,$26,$00,$00			;;08-27-07
	db	$68,$0C,$00,$00,$00,$00,$20,$00			;;08-27-07
	db	$39,$34,$12,$EF,$D2,$01,$0A,$03			;;08-27-07
	db	$00,$00,$00,$00,$40,$01,$EF,$00			;;08-27-07
	db	$82,$00                        			;;08-27-07
;;	db	$10,$b0,$99,$45,$00,$26,$00,$00
;;	db	$68,$0c,$00,$00,$00,$00,$39,$40
;;	db	$01,$d0,$01,$34,$14,$ea,$d0,$03
;;	db	$00,$00,$00,$00,$40,$01,$ea,$00
;;	db	$82,$00,$20,$00,$00,$48,$00

ucaZoomAdrP2:
	db	$2e,$2f,$30,$31			;;08-27-07
ucaZoomAdrP2_End:

ucaZoomDataP2_NTSC:
	db	$82,$50,$22,$61			;;08-27-07

ucaZoomDataP2_PAL:
	db	$88,$50,$2a,$c1			;;08-27-07

ucaSignalStdRegP2:
	db	$0c,$18,$19,$1a,$1b,$82			;;08-27-07
ucaSignalStdReg_End:

ucaSignalStdValP2_NTSC:
	db	$a5,$21,$f0,$7c,$0f,$42			;;08-27-07

ucaSignalStdValP2_PAL:
	db	$97,$2a,$09,$8a,$cb,$52			;;08-27-07

TconP1Adr:
	db	$20,$21,$22,$23,$24,$25,$26,$27			;;08-27-07
	db	$28,$29,$2A,$2B,$2C,$2D,$2E,$2F			;;08-27-07
	db	$30,$31,$32,$33,$34,$35					;;08-27-07
TconP1Adr_End:

TconP1Data:
	db	$20,$75,$A1,$00,$10,$A8,$00,$00			;;08-27-07
	db	$03,$20,$00,$04,$18,$02,$00,$00			;;08-27-07
	db	$00,$0F,$00,$0F,$00,$01        			;;08-27-07
;;	db	$20,$75,$a1,$00,$10,$a8,$00,$00
;;	db	$03,$20,$00,$04,$00,$02,$00,$00
;;	db	$00,$0f,$00,$0f,$00,$01
TconP1Data_End:
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