📄 t101_util.lst
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C51 COMPILER V7.06 T101_UTIL 06/16/2005 10:05:39 PAGE 1
C51 COMPILER V7.06, COMPILATION OF MODULE T101_UTIL
OBJECT MODULE PLACED IN F:\T100_C~1\HUI_CH~1\铁将军\SIMULA~2\T101_UTIL.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE F:\T100_C~1\HUI_CH~1\铁将军\SIMULA~2\T101_UTIL.C DB SB OE
stmt level source
1 #include <reg51.h>
2 #include "math.h"
3 #include "common.h"
4 #include "system.h"
5 #include "struct.h"
6 #include "T101_Util.h"
7 #include "TW101Reg.h"
8 #include "OSDDraw.h"
9 #include "twowire.h"
10 #include "display.h"
11 #include "keypad.h"
12 extern void ClosePanel (void);
13 extern void OpenPanel (void);
14 extern void Timer0Stop (void);
15
16 extern uCHAR idata m_cStandard;
17 extern uCHAR idata m_cScaleratio;
18 extern uWORD m_wHRes;
19 extern uWORD m_wVRes;
20 extern uWORD idata m_wBuff[3];
21 extern uCHAR IDATA m_cBuff[4];
22 extern uWORD m_wDWHSZ;
23 extern uWORD idata m_wVTotal;
24 extern uCHAR cSVideo;
25 extern uCHAR idata m_cSource;//Kuo
26
27 static bit NoSignal=0;
28
29 //Ruby add 2004-06-21
30 #ifdef ROTATE
31 #ifndef T100
uCHAR Dis_Mode=BOTTOM_RIGHT;
#else
34 uCHAR Dis_Mode=TOP_LEFT;
35 #endif
36 #endif
37
38 void InitTW101(void)
39 {
40 1
41 1 I2CWriteByte(TW101,ADC_ROFF, 0x60);
42 1 I2CWriteByte(TW101,ADC_GOFF, 0x60);
43 1 I2CWriteByte(TW101,ADC_BOFF, 0x60);
44 1
45 1 I2CWriteByte(TW101,0xe0, 0x92);
46 1
47 1 I2CWriteByte(TW101,0x0d, 0x20);
48 1 I2CWriteByte(TW101,0x11, 0x05);//
49 1 //Source Select--S Video
50 1 I2CWriteByte(TW101,0x18, 0x00);
51 1 I2CWriteByte(TW101,0x19, 0x07);
52 1 #ifdef T100
53 1 I2CWriteByte(TW101,0x1a, 0x87);
54 1 #else
I2CWriteByte(TW101,0x1a, 0xc7);
C51 COMPILER V7.06 T101_UTIL 06/16/2005 10:05:39 PAGE 2
#endif
57 1 I2CWriteByte(TW101,0x97, 0x95);
58 1 I2CWriteByte(TW101,0x98, 0xCC);//930813 Ruby
59 1
60 1
61 1 //Video Register Page Setted
62 1 I2CWriteByte(TW101+4,0x00, 0x01);
63 1 I2CWriteByte(TW101+4,0x02, 0x4b);
64 1 I2CWriteByte(TW101+4,0x03, 0x03);
65 1 I2CWriteByte(TW101+4,0x0c, 0x8a);
66 1 // I2CWriteByte(TW101+4,0x01, 0x01);
67 1 I2CWriteByte(TW101+4,0x18, 0x21);
68 1 I2CWriteByte(TW101+4,0x19, 0xf0);
69 1 I2CWriteByte(TW101+4,0x1a, 0x7c);
70 1 I2CWriteByte(TW101+4,0x1b, 0x1f);
71 1 #ifdef T100
72 1 I2CWriteByte(TW101+4,0x24, 0xe9);
73 1 I2CWriteByte(TW101+4,0x25, 0x0F);
74 1 #else
I2CWriteByte(TW101+4,0x24, 0x00);
I2CWriteByte(TW101+4,0x25, 0x07);
#endif
78 1 I2CWriteByte(TW101+4,0x2e, 0x82);
79 1 I2CWriteByte(TW101+4,0x2f, 0x30);
80 1 I2CWriteByte(TW101+4,0x30,0x24);// 0x22);
81 1 I2CWriteByte(TW101+4,0x31, 0x61);
82 1 I2CWriteByte(TW101+4,0x3f, 0x00);
83 1 I2CWriteByte(TW101+4,0x82, 0x42);
84 1 I2CWriteByte(TW101+4,0xc0, 0x14);
85 1 I2CWriteByte(TW101+4,0xc1, 0x01);
86 1 I2CWriteByte(TW101+4,0xe0, 0x10);
87 1
88 1 //Enable CSC
89 1 I2CWriteByte(TW101,0x90, 0x04);
90 1 I2CWriteByte(TW101,0x91, 0x87);
91 1 //DSP Clock
92 1 I2CWriteByte(TW101, PLLDIV_F,DFDIV_40);
93 1 I2CWriteByte(TW101, PLLDIV_I,DIDIV);
94 1 #ifdef T100
95 1 I2CWriteByte(TW101, PLLDIV_O,DODIV);
96 1 I2CWriteByte(TW101, 0xc2, 0x12);
97 1 #else
I2CWriteByte(TW101, PLLDIV_O,0x10|DODIV);
I2CWriteByte(TW101, 0xc2, 0x00);
#endif
101 1 //DSP Colck Polarity
102 1 I2CWriteByte(TW101,0xc1, 0xc8);
103 1
104 1 //H&V Main Display Pixel Clock Setted
105 1
106 1 I2CWriteByte(TW101,0xdc, (uCHAR)(H_Size&0xFF));//H Size
107 1 I2CWriteByte(TW101,0xdd, (uCHAR)(H_Size>>8));
108 1
109 1 I2CWriteByte(TW101,0xde, (uCHAR)((V_Size-1)&0xFF));//V Size
110 1 I2CWriteByte(TW101,0xdf, (uCHAR)(V_Size>>8));
111 1
112 1
113 1 //H&V Display Pixel Clock Setted
114 1 I2CWriteByte(TW101,0xb0, 0x20);//H Start
115 1 I2CWriteByte(TW101,0xb1, 0x00);
116 1 I2CWriteByte(TW101,0xb2, 0x20);//V Start
117 1 I2CWriteByte(TW101,0xb3, 0x00);
C51 COMPILER V7.06 T101_UTIL 06/16/2005 10:05:39 PAGE 3
118 1 I2CWriteByte(TW101,0xb4, (uCHAR)(H_Size&0xFF));//H Width
119 1 I2CWriteByte(TW101,0xb5, (uCHAR)(H_Size>>8));
120 1 I2CWriteByte(TW101,0xb6, (uCHAR)((V_Size)&0xFF));
121 1 I2CWriteByte(TW101,0xb7, (uCHAR)(V_Size>>8));
122 1 I2CWriteByte(TW101,0xb8, 0x10);//H Total
123 1 I2CWriteByte(TW101,0xb9, 0x05);
124 1 I2CWriteByte(TW101,0xba, 0x2f);//V Total
125 1 I2CWriteByte(TW101,0xbb, 0x02);
126 1 I2CWriteByte(TW101,0xbc, 0x20);//HSYNC Width
127 1 I2CWriteByte(TW101,0xbd, 0x00);
128 1 I2CWriteByte(TW101,0xbe, 0x04);//VSYNC Width
129 1 I2CWriteByte(TW101,0xbf, 0x00);
130 1
131 1
132 1 //Scaling
133 1 I2CWriteByte(TW101,0x72, 0x33);//H Scale
134 1 I2CWriteByte(TW101,0x73, 0x73);
135 1 I2CWriteByte(TW101,0x74, 0x00);//V Scale
136 1 I2CWriteByte(TW101,0x75, 0x40);
137 1
138 1
139 1 //LineBuffer Prefill
140 1 I2CWriteByte(TW101,0x84, 0x00);
141 1 I2CWriteByte(TW101,0x85, 0x01);
142 1
143 1 I2CWriteByte(TW101,0xe1, 0xa0);
144 1 I2CWriteByte(TW101,0x50, 0x10);
145 1 I2CWriteByte(TW101,0x38, 0x50);
146 1 I2CWriteByte(TW101,0x39, 0x00);
147 1 I2CWriteByte(TW101,0x3a, 0x20);
148 1 I2CWriteByte(TW101,0x3b, 0x03);
149 1 #ifdef TCON
150 1 #ifdef T100
151 1 I2CWriteByte(TW101,0xe0, 0x9d);
152 1 I2CWriteByte(TW101,0xe1, 0xf4);
153 1 #else
I2CWriteByte(TW101,0xe0, 0x9d);
I2CWriteByte(TW101,0xe1, 0xe0);
#endif
157 1 #else
I2CWriteByte(TW101,0xe0, 0x9c);
I2CWriteByte(TW101,0xe1, 0x00);
#endif
161 1 #ifdef KVGA
162 1 SET_Dismod();
163 1 #endif
164 1 #ifdef WVGA
SET_Dismod();
#endif
167 1
168 1
169 1 I2CWriteByte(TW101, 0x9c, 0x02);
170 1 //#ifdef T100
171 1 I2CWriteByte(TW101, 0x90, 0x06);
172 1 I2CWriteByte(TW101+4, 0x04, 0xDD);
173 1 I2CWriteByte(TW101+4, 0x10, 0x27);
174 1 I2CWriteByte(TW101+4, 0x00, 0x00);
175 1 I2CWriteByte(TW101+4, 0x03, 0x00);
176 1 I2CWriteByte(TW101+4, 0x02, 0x4B);
177 1 //I2CWriteByte(TW101+4, 0x39, 0x8A); // even or odd field polarity
178 1 I2CWriteByte(TW101+4, 0x39, 0x0A);// default
179 1 I2CWriteByte(TW101+4, 0x08, 0x58); //0x80);
C51 COMPILER V7.06 T101_UTIL 06/16/2005 10:05:39 PAGE 4
180 1 I2CWriteByte(TW101+4, 0x11, 0xb9);
181 1 /*
182 1 #else
183 1 I2CWriteByte(TW101, 0x90, 0x07);
184 1 I2CWriteByte(TW101+4, 0x02, 0x0a);
185 1 I2CWriteByte(TW101+4, 0x04, 0x64);
186 1 I2CWriteByte(TW101+4, 0x11, 0xFF);
187 1 #endif*/
188 1 // I2CWriteByte(TW101+4, 0x07, 0x01);
189 1
190 1
191 1
192 1 // I2CWriteByte(TW101, 0x65, 0x88); //Ruby 2004-08-30
193 1 // I2CWriteByte(TW101, 0x66, 0xff); //Keep in default 2004-10-06 //Ruby 2004-08-30
194 1
195 1 I2CWriteByte(TW101,0x30,(I2CReadByte(TW101, 0x30)|0x01)); //De-Interlace enable
196 1 I2CWriteByte(TW101+4,0x01,(I2CReadByte(TW101+4, 0x01)|0x01));//Color
197 1
198 1 //#ifdef T100
199 1 /////////////for image quality
200 1 I2CWriteByte(TW101,0x1c,0xC0);// 2004-10-16 0xb8);
201 1 I2CWriteByte(TW101+4,0x80,0x05); //04); 2004-10-16// 0x05); //For char clear 2004-10-07
202 1 I2CWriteByte(TW101+4,0x0F,0x05); // for color bar clear 2004-10-07 01 --> color bar clear 0C -->
- player clear
203 1 I2CWriteByte(TW101,0x6C,0x80);// 2004-10-16 0x40);
204 1 I2CWriteByte(TW101+4,0x07,0x02|0x20); // for color bar clear 2004-10-07
205 1 I2CWriteByte(TW101, 0x60, 0x01);
206 1 I2CWriteByte(TW101,0x61,0x8F); //For char clear 2004-10-08
207 1 I2CWriteByte(TW101,0x62,0x0F); //For char clear 2004-10-08
208 1 I2CWriteByte(TW101,0x63,0x0F); //For char clear 2004-10-08
209 1 I2CWriteByte(TW101,0x64,0x04); //For char clear 2004-10-08
210 1 I2CWriteByte(TW101,0x66,0xff); //For color clear 2004-11-25 enable DCTI
211 1 I2CWriteByte(TW101,0x1C,0xC0);// 2004-10-16 0xF0); //For image quality 2004-10-08
212 1 I2CWriteByte(TW101+4,0x08,0x58);//0x80);//2004-10-16 0x6A); //For image quality 2004-10-09
213 1 I2CWriteByte(TW101+4,0x09,0x28);//0x20);//2004-10-16 0x18); //For image quality 2004-10-09
214 1 // page2 0x24 need to fine tune in assamble time, because different decoder will nedd different value
215 1 // working with 0x24 I2CWriteByte(TW101, 0x66, 0xff); //Keep in default 2004-10-06 //Ruby 2004-08-30
216 1 //#endif
217 1 //////////////////////////////////////////////
218 1 #ifdef T515 // For T515 test
I2CWriteByte(TW101+4,0x01,0x05);
I2CWriteByte(TW101+4,0x02,0x4B);
I2CWriteByte(TW101+4,0x08,0x80);
I2CWriteByte(TW101+4,0x09,0x20);
I2CWriteByte(TW101+4,0x10,0x27);
I2CWriteByte(TW101,0x60,0x02);
I2CWriteByte(TW101,0x62,0x04);
#endif
227 1 I2CWriteByte(TW101, 0xE8, 0x11);
228 1 }
229 #ifdef TCON // for TCON only
230 extern uCHAR cSTV_OFFSET,cGATE_PREDRIVE;
231 void TconInit(void)
232 {
233 1 #ifdef T100
234 1
235 1 I2CWriteByte(TW101+2, 0x20, 0x21);
236 1 I2CWriteByte(TW101+2, 0x21, TIME_PROTOCOL);
237 1 I2CWriteByte(TW101+2, 0x22, 0x02);
238 1 I2CWriteByte(TW101+2, 0x23, 0x02);
239 1 // I2CWriteByte(TW101+2, 0x22, 0x2D);
240 1 // I2CWriteByte(TW101+2, 0x23, 0x02);
C51 COMPILER V7.06 T101_UTIL 06/16/2005 10:05:39 PAGE 5
241 1 I2CWriteByte(TW101+2, 0x24, 0x0C);
242 1 // I2CWriteByte(TW101+2, 0x25, 0x4B);
243 1 // I2CWriteByte(TW101+2, 0x26, 0x02);
244 1 I2CWriteByte(TW101+2, 0x25, 0x02);
245 1 I2CWriteByte(TW101+2, 0x26, 0x02);
246 1 // I2CWriteByte(TW101+2, 0x27, 0x1C);
247 1 // I2CWriteByte(TW101+2, 0x28, 0x02);
248 1 I2CWriteByte(TW101+2, 0x27, 0xf2);
249 1 I2CWriteByte(TW101+2, 0x28, 0x01);
250 1
251 1 I2CWriteByte(TW101+2, 0x29, 0x29);
252 1 I2CWriteByte(TW101+2, 0x2A, 0x00);
253 1 I2CWriteByte(TW101+2, 0x2B, 0x01);
254 1 I2CWriteByte(TW101+2, 0x2C, 0x18);
255 1 I2CWriteByte(TW101+2, 0x2D, cGATE_PREDRIVE);//0x03);
256 1 I2CWriteByte(TW101+2, 0x2E, 0x00);
257 1 I2CWriteByte(TW101+2, 0x30, 0x01);
258 1 // I2CWriteByte(TW101+2, 0x31, 0xFB);
259 1 // I2CWriteByte(TW101+2, 0x32, 0x01);
260 1 // I2CWriteByte(TW101+2, 0x33, 0x37);
261 1 // I2CWriteByte(TW101+2, 0x34, 0x00);
262 1 I2CWriteByte(TW101+2, 0x31, 0xcd);
263 1 I2CWriteByte(TW101+2, 0x32, 0x01);
264 1 I2CWriteByte(TW101+2, 0x33, 0x35);
265 1 I2CWriteByte(TW101+2, 0x34, 0x00);
266 1 I2CWriteByte(TW101+2, 0x35, cSTV_OFFSET);
267 1 I2CWriteByte(TW101, 0x50, 0x06);
268 1 I2CWriteByte(TW101, 0x38, 0x50);
269 1 I2CWriteByte(TW101, 0x39, 0x00);
270 1 I2CWriteByte(TW101, 0x3A, 0x20);
271 1 I2CWriteByte(TW101, 0x3B, 0x03);
272 1 //I2CWriteByte(TW101, 0x70, 0x81);
273 1 I2CWriteByte(TW101, 0x70, 0x81);
274 1
275 1 #else
I2CWriteByte(TW101+2,0x20, 0x20);
I2CWriteByte(TW101+2,0x21, 0x3F);
I2CWriteByte(TW101+2,0x22, 0x90);
I2CWriteByte(TW101+2,0x23, 0x04);
I2CWriteByte(TW101+2,0x24, 0x10);
I2CWriteByte(TW101+2,0x25, 0x80);
I2CWriteByte(TW101+2,0x26, 0x04);
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