📄 t101_util.c
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#include <reg51.h>
#include "math.h"
#include "common.h"
#include "system.h"
#include "struct.h"
#include "T101_Util.h"
#include "TW101Reg.h"
#include "OSDDraw.h"
#include "twowire.h"
#include "display.h"
#include "keypad.h"
extern void ClosePanel (void);
extern void OpenPanel (void);
extern void Timer0Stop (void);
extern uCHAR idata m_cStandard;
extern uCHAR idata m_cScaleratio;
extern uWORD m_wHRes;
extern uWORD m_wVRes;
extern uWORD idata m_wBuff[3];
extern uCHAR IDATA m_cBuff[4];
extern uWORD m_wDWHSZ;
extern uWORD idata m_wVTotal;
extern uCHAR cSVideo;
extern uCHAR idata m_cSource;//Kuo
static bit NoSignal=0;
//Ruby add 2004-06-21
#ifdef ROTATE
#ifndef T100
uCHAR Dis_Mode=BOTTOM_RIGHT;
#else
uCHAR Dis_Mode=TOP_LEFT;
#endif
#endif
void InitTW101(void)
{
I2CWriteByte(TW101,ADC_ROFF, 0x60);
I2CWriteByte(TW101,ADC_GOFF, 0x60);
I2CWriteByte(TW101,ADC_BOFF, 0x60);
I2CWriteByte(TW101,0xe0, 0x92);
I2CWriteByte(TW101,0x0d, 0x20);
I2CWriteByte(TW101,0x11, 0x05);//
//Source Select--S Video
I2CWriteByte(TW101,0x18, 0x00);
I2CWriteByte(TW101,0x19, 0x07);
#ifdef T100
I2CWriteByte(TW101,0x1a, 0x87);
#else
I2CWriteByte(TW101,0x1a, 0xc7);
#endif
I2CWriteByte(TW101,0x97, 0x95);
I2CWriteByte(TW101,0x98, 0xCC);//930813 Ruby
//Video Register Page Setted
I2CWriteByte(TW101+4,0x00, 0x01);
I2CWriteByte(TW101+4,0x02, 0x4b);
I2CWriteByte(TW101+4,0x03, 0x03);
I2CWriteByte(TW101+4,0x0c, 0x8a);
// I2CWriteByte(TW101+4,0x01, 0x01);
I2CWriteByte(TW101+4,0x18, 0x21);
I2CWriteByte(TW101+4,0x19, 0xf0);
I2CWriteByte(TW101+4,0x1a, 0x7c);
I2CWriteByte(TW101+4,0x1b, 0x1f);
#ifdef T100
I2CWriteByte(TW101+4,0x24, 0xe9);
I2CWriteByte(TW101+4,0x25, 0x0F);
#else
I2CWriteByte(TW101+4,0x24, 0x00);
I2CWriteByte(TW101+4,0x25, 0x07);
#endif
I2CWriteByte(TW101+4,0x2e, 0x82);
I2CWriteByte(TW101+4,0x2f, 0x30);
I2CWriteByte(TW101+4,0x30,0x24);// 0x22);
I2CWriteByte(TW101+4,0x31, 0x61);
I2CWriteByte(TW101+4,0x3f, 0x00);
I2CWriteByte(TW101+4,0x82, 0x42);
I2CWriteByte(TW101+4,0xc0, 0x14);
I2CWriteByte(TW101+4,0xc1, 0x01);
I2CWriteByte(TW101+4,0xe0, 0x10);
//Enable CSC
I2CWriteByte(TW101,0x90, 0x04);
I2CWriteByte(TW101,0x91, 0x87);
//DSP Clock
I2CWriteByte(TW101, PLLDIV_F,DFDIV_40);
I2CWriteByte(TW101, PLLDIV_I,DIDIV);
#ifdef T100
I2CWriteByte(TW101, PLLDIV_O,DODIV);
I2CWriteByte(TW101, 0xc2, 0x12);
#else
I2CWriteByte(TW101, PLLDIV_O,0x10|DODIV);
I2CWriteByte(TW101, 0xc2, 0x00);
#endif
//DSP Colck Polarity
I2CWriteByte(TW101,0xc1, 0xc8);
//H&V Main Display Pixel Clock Setted
I2CWriteByte(TW101,0xdc, (uCHAR)(H_Size&0xFF));//H Size
I2CWriteByte(TW101,0xdd, (uCHAR)(H_Size>>8));
I2CWriteByte(TW101,0xde, (uCHAR)((V_Size-1)&0xFF));//V Size
I2CWriteByte(TW101,0xdf, (uCHAR)(V_Size>>8));
//H&V Display Pixel Clock Setted
I2CWriteByte(TW101,0xb0, 0x20);//H Start
I2CWriteByte(TW101,0xb1, 0x00);
I2CWriteByte(TW101,0xb2, 0x20);//V Start
I2CWriteByte(TW101,0xb3, 0x00);
I2CWriteByte(TW101,0xb4, (uCHAR)(H_Size&0xFF));//H Width
I2CWriteByte(TW101,0xb5, (uCHAR)(H_Size>>8));
I2CWriteByte(TW101,0xb6, (uCHAR)((V_Size)&0xFF));
I2CWriteByte(TW101,0xb7, (uCHAR)(V_Size>>8));
I2CWriteByte(TW101,0xb8, 0x10);//H Total
I2CWriteByte(TW101,0xb9, 0x05);
I2CWriteByte(TW101,0xba, 0x2f);//V Total
I2CWriteByte(TW101,0xbb, 0x02);
I2CWriteByte(TW101,0xbc, 0x20);//HSYNC Width
I2CWriteByte(TW101,0xbd, 0x00);
I2CWriteByte(TW101,0xbe, 0x04);//VSYNC Width
I2CWriteByte(TW101,0xbf, 0x00);
//Scaling
I2CWriteByte(TW101,0x72, 0x33);//H Scale
I2CWriteByte(TW101,0x73, 0x73);
I2CWriteByte(TW101,0x74, 0x00);//V Scale
I2CWriteByte(TW101,0x75, 0x40);
//LineBuffer Prefill
I2CWriteByte(TW101,0x84, 0x00);
I2CWriteByte(TW101,0x85, 0x01);
I2CWriteByte(TW101,0xe1, 0xa0);
I2CWriteByte(TW101,0x50, 0x10);
I2CWriteByte(TW101,0x38, 0x50);
I2CWriteByte(TW101,0x39, 0x00);
I2CWriteByte(TW101,0x3a, 0x20);
I2CWriteByte(TW101,0x3b, 0x03);
#ifdef TCON
#ifdef T100
I2CWriteByte(TW101,0xe0, 0x9d);
I2CWriteByte(TW101,0xe1, 0xf4);
#else
I2CWriteByte(TW101,0xe0, 0x9d);
I2CWriteByte(TW101,0xe1, 0xe0);
#endif
#else
I2CWriteByte(TW101,0xe0, 0x9c);
I2CWriteByte(TW101,0xe1, 0x00);
#endif
#ifdef KVGA
SET_Dismod();
#endif
#ifdef WVGA
SET_Dismod();
#endif
I2CWriteByte(TW101, 0x9c, 0x02);
//#ifdef T100
I2CWriteByte(TW101, 0x90, 0x06);
I2CWriteByte(TW101+4, 0x04, 0xDD);
I2CWriteByte(TW101+4, 0x10, 0x27);
I2CWriteByte(TW101+4, 0x00, 0x00);
I2CWriteByte(TW101+4, 0x03, 0x00);
I2CWriteByte(TW101+4, 0x02, 0x4B);
//I2CWriteByte(TW101+4, 0x39, 0x8A); // even or odd field polarity
I2CWriteByte(TW101+4, 0x39, 0x0A);// default
I2CWriteByte(TW101+4, 0x08, 0x58); //0x80);
I2CWriteByte(TW101+4, 0x11, 0xb9);
/*
#else
I2CWriteByte(TW101, 0x90, 0x07);
I2CWriteByte(TW101+4, 0x02, 0x0a);
I2CWriteByte(TW101+4, 0x04, 0x64);
I2CWriteByte(TW101+4, 0x11, 0xFF);
#endif*/
// I2CWriteByte(TW101+4, 0x07, 0x01);
// I2CWriteByte(TW101, 0x65, 0x88); //Ruby 2004-08-30
// I2CWriteByte(TW101, 0x66, 0xff); //Keep in default 2004-10-06 //Ruby 2004-08-30
I2CWriteByte(TW101,0x30,(I2CReadByte(TW101, 0x30)|0x01)); //De-Interlace enable
I2CWriteByte(TW101+4,0x01,(I2CReadByte(TW101+4, 0x01)|0x01));//Color
//#ifdef T100
/////////////for image quality
I2CWriteByte(TW101,0x1c,0xC0);// 2004-10-16 0xb8);
I2CWriteByte(TW101+4,0x80,0x05); //04); 2004-10-16// 0x05); //For char clear 2004-10-07
I2CWriteByte(TW101+4,0x0F,0x05); // for color bar clear 2004-10-07 01 --> color bar clear 0C --> player clear
I2CWriteByte(TW101,0x6C,0x80);// 2004-10-16 0x40);
I2CWriteByte(TW101+4,0x07,0x02|0x20); // for color bar clear 2004-10-07
I2CWriteByte(TW101, 0x60, 0x01);
I2CWriteByte(TW101,0x61,0x8F); //For char clear 2004-10-08
I2CWriteByte(TW101,0x62,0x0F); //For char clear 2004-10-08
I2CWriteByte(TW101,0x63,0x0F); //For char clear 2004-10-08
I2CWriteByte(TW101,0x64,0x04); //For char clear 2004-10-08
I2CWriteByte(TW101,0x66,0xff); //For color clear 2004-11-25 enable DCTI
I2CWriteByte(TW101,0x1C,0xC0);// 2004-10-16 0xF0); //For image quality 2004-10-08
I2CWriteByte(TW101+4,0x08,0x58);//0x80);//2004-10-16 0x6A); //For image quality 2004-10-09
I2CWriteByte(TW101+4,0x09,0x28);//0x20);//2004-10-16 0x18); //For image quality 2004-10-09
// page2 0x24 need to fine tune in assamble time, because different decoder will nedd different value
// working with 0x24 I2CWriteByte(TW101, 0x66, 0xff); //Keep in default 2004-10-06 //Ruby 2004-08-30
//#endif
//////////////////////////////////////////////
#ifdef T515 // For T515 test
I2CWriteByte(TW101+4,0x01,0x05);
I2CWriteByte(TW101+4,0x02,0x4B);
I2CWriteByte(TW101+4,0x08,0x80);
I2CWriteByte(TW101+4,0x09,0x20);
I2CWriteByte(TW101+4,0x10,0x27);
I2CWriteByte(TW101,0x60,0x02);
I2CWriteByte(TW101,0x62,0x04);
#endif
I2CWriteByte(TW101, 0xE8, 0x11);
}
#ifdef TCON // for TCON only
extern uCHAR cSTV_OFFSET,cGATE_PREDRIVE;
void TconInit(void)
{
#ifdef T100
I2CWriteByte(TW101+2, 0x20, 0x21);
I2CWriteByte(TW101+2, 0x21, TIME_PROTOCOL);
I2CWriteByte(TW101+2, 0x22, 0x02);
I2CWriteByte(TW101+2, 0x23, 0x02);
// I2CWriteByte(TW101+2, 0x22, 0x2D);
// I2CWriteByte(TW101+2, 0x23, 0x02);
I2CWriteByte(TW101+2, 0x24, 0x0C);
// I2CWriteByte(TW101+2, 0x25, 0x4B);
// I2CWriteByte(TW101+2, 0x26, 0x02);
I2CWriteByte(TW101+2, 0x25, 0x02);
I2CWriteByte(TW101+2, 0x26, 0x02);
// I2CWriteByte(TW101+2, 0x27, 0x1C);
// I2CWriteByte(TW101+2, 0x28, 0x02);
I2CWriteByte(TW101+2, 0x27, 0xf2);
I2CWriteByte(TW101+2, 0x28, 0x01);
I2CWriteByte(TW101+2, 0x29, 0x29);
I2CWriteByte(TW101+2, 0x2A, 0x00);
I2CWriteByte(TW101+2, 0x2B, 0x01);
I2CWriteByte(TW101+2, 0x2C, 0x18);
I2CWriteByte(TW101+2, 0x2D, cGATE_PREDRIVE);//0x03);
I2CWriteByte(TW101+2, 0x2E, 0x00);
I2CWriteByte(TW101+2, 0x30, 0x01);
// I2CWriteByte(TW101+2, 0x31, 0xFB);
// I2CWriteByte(TW101+2, 0x32, 0x01);
// I2CWriteByte(TW101+2, 0x33, 0x37);
// I2CWriteByte(TW101+2, 0x34, 0x00);
I2CWriteByte(TW101+2, 0x31, 0xcd);
I2CWriteByte(TW101+2, 0x32, 0x01);
I2CWriteByte(TW101+2, 0x33, 0x35);
I2CWriteByte(TW101+2, 0x34, 0x00);
I2CWriteByte(TW101+2, 0x35, cSTV_OFFSET);
I2CWriteByte(TW101, 0x50, 0x06);
I2CWriteByte(TW101, 0x38, 0x50);
I2CWriteByte(TW101, 0x39, 0x00);
I2CWriteByte(TW101, 0x3A, 0x20);
I2CWriteByte(TW101, 0x3B, 0x03);
//I2CWriteByte(TW101, 0x70, 0x81);
I2CWriteByte(TW101, 0x70, 0x81);
#else
I2CWriteByte(TW101+2,0x20, 0x20);
I2CWriteByte(TW101+2,0x21, 0x3F);
I2CWriteByte(TW101+2,0x22, 0x90);
I2CWriteByte(TW101+2,0x23, 0x04);
I2CWriteByte(TW101+2,0x24, 0x10);
I2CWriteByte(TW101+2,0x25, 0x80);
I2CWriteByte(TW101+2,0x26, 0x04);
I2CWriteByte(TW101+2,0x27, 0x00);
I2CWriteByte(TW101+2,0x28, 0x03);
I2CWriteByte(TW101+2,0x29, 0x20);
I2CWriteByte(TW101+2,0x2A, 0x00);
I2CWriteByte(TW101+2,0x2B, 0x03);
I2CWriteByte(TW101+2,0x2C, 0x18);
I2CWriteByte(TW101+2,0x2D, 0x02);
I2CWriteByte(TW101+2,0x2E, 0x00);
I2CWriteByte(TW101+2,0x2F, 0x00);
I2CWriteByte(TW101+2,0x30, 0x00);
I2CWriteByte(TW101+2,0x31, 0x0F);
I2CWriteByte(TW101+2,0x32, 0x00);
I2CWriteByte(TW101+2,0x33, 0x0F);
I2CWriteByte(TW101+2,0x34, 0x00);
I2CWriteByte(TW101+2,0x35, 0x01);
I2CWriteByte(TW101+2,0x37, 0x80);
I2CWriteByte(TW101+2,0x38, 0x02);
#endif
}
#endif
#ifdef RSDS
void RsdsInit(void)
{
I2CWriteByte(TW101+2,0x20,0x02);
I2CWriteByte(TW101+2,0x21,0x3F);
I2CWriteByte(TW101+2,0x22,0x10);
I2CWriteByte(TW101+2,0x23,0x05);
I2CWriteByte(TW101+2,0x24,0x10);
I2CWriteByte(TW101+2,0x25,0x04);
I2CWriteByte(TW101+2,0x26,0x05);
I2CWriteByte(TW101+2,0x27,0x00);
I2CWriteByte(TW101+2,0x28,0x03);
I2CWriteByte(TW101+2,0x29,0xFF);
I2CWriteByte(TW101+2,0x2A,0x00);
I2CWriteByte(TW101+2,0x2B,0x03);
I2CWriteByte(TW101+2,0x2C,0x18);
I2CWriteByte(TW101+2,0x2D,0x02);
I2CWriteByte(TW101+2,0x2E,0x00);
I2CWriteByte(TW101+2,0x2F,0x00);
I2CWriteByte(TW101+2,0x30,0x00);
I2CWriteByte(TW101+2,0x31,0x0F);
I2CWriteByte(TW101+2,0x32,0x00);
I2CWriteByte(TW101+2,0x33,0x0F);
I2CWriteByte(TW101+2,0x34,0x00);
I2CWriteByte(TW101+2,0x35,0x01);
I2CWriteByte(TW101+2,0x37,0x80);
I2CWriteByte(TW101+2,0x38,0x02);
I2CWriteByte(TW101,0xD0, 0x01);
I2CWriteByte(TW101,0xD1, 0x11);
I2CWriteByte(TW101,0xD3, 0xAA);
I2CWriteByte(TW101,0xD4, 0xAA);
I2CWriteByte(TW101,0xD5, 0xAA);
I2CWriteByte(TW101,0xD6, 0xAA);
I2CWriteByte(TW101,0xD7, 0xAA);
I2CWriteByte(TW101,0xD8, 0xAA);
}
#endif //RSDS
/////////////////////////
//This function setup the display direction
///////////////////////////
extern uCHAR cSTV1_ON;
#ifdef KVGA
void SET_Dismod(void)
{
uCHAR UD_LR,UD_RL,DU_LR,DU_RL;
switch(cSTV1_ON)
{
case 0:
UD_LR= 0xAc;
UD_RL= 0xB8;
DU_LR= 0xA0;
DU_RL= 0xB4;
/* UD_LR= 0xB4;
UD_RL= 0xA0;
DU_LR= 0xFC;
DU_RL= 0xE8;*/
break;
case 1:
UD_LR= 0xF4;
UD_RL= 0xE0;
DU_LR= 0xBC;
DU_RL= 0xA8;
break;
case 2:
UD_LR= 0xAC;
UD_RL= 0xB8;
DU_LR= 0xE4;
DU_RL= 0xF0;
break;
case 3:
UD_LR= 0xA4;
UD_RL= 0xB0;
DU_LR= 0xEC;
DU_RL= 0xF8;
break;
default:
UD_LR= 0xb4;
UD_RL= 0xAc;
DU_LR= 0xE0;
DU_RL= 0xF8;
}
switch (Dis_Mode)
{
case TOP_LEFT: //Start from top-left
LEFT_RIGHT = RIGHT;
UP_DOWN =DOWN;
I2CWriteByte(TW101,0xE1,UD_LR );// 0xe4 0xf4
break;
case TOP_RIGHT: //Start from top-right
LEFT_RIGHT = LEFT;
UP_DOWN =DOWN;
I2CWriteByte(TW101,0xE1,UD_RL );//0xf0 0xe0
break;
case BOTTOM_LEFT: //Start from bottom-left
LEFT_RIGHT = RIGHT;
UP_DOWN =UP;
I2CWriteByte(TW101,0xE1,DU_LR );//0xbc0x2c
break;
case BOTTOM_RIGHT: //Start from bottom-right
LEFT_RIGHT = LEFT;
UP_DOWN =UP;
I2CWriteByte(TW101,0xE1,DU_RL );//0x880x38
break;
}
return;
}
#endif
#ifdef WVGA
void SET_Dismod(void)
{
switch (Dis_Mode)
{
case TOP_LEFT: //Start from top-left
LEFT_RIGHT = RIGHT;
UP_DOWN =DOWN;
I2CWriteByte(TW101,0xE1, (STV1|STH1)&0xFF);
break;
case TOP_RIGHT: //Start from top-right
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