main.c

mc9s12dg128 freescale16位单片机的pwm模块使用例程

/*PWM模块：采用PWM0 PWM1，PWM2三个通道，通道0输出周期为333Hz,占空比为25％的波形
通道1输出周期为10KHz,占空比为50％的波形，通道2输出周期为10KHz,占空比为75％的波形*/

#include <hidef.h>      /* common defines and macros */
#include <mc9s12dg128.h>     /* derivative information */
#include <stdio.h>
#pragma LINK_INFO DERIVATIVE "mc9s12dg128b"


 char buf[30];
void TransmitT(char *text)
{unsigned char a;
  a=SCI0SR1;
  while (*text != '\0')
        {while (!(SCI0SR1 & 0x80));  /* wait for output buffer empty */
         SCI0DRL = *text++;}
}
void IniCOM(void)
{SCI0BDL=163;		//6M晶镇，25M总线
 SCI0CR1=0;	 //无奇偶校验,1个起始位8个数据位1个停止位
 SCI0CR2 = 0x2c;  //允许接收中断
}
void InitialRegs(void)    
{
/*---------串口初始化------*/ 
  IniCOM();

/*--------锁相环初始化-------*/
  CLKSEL=0x00;             //disable pll;
   CLKSEL=0;
  CLKSEL_PLLSEL = 0;                   
  PLLCTL_PLLON = 0;                   
  SYNR = 24;          //6M晶镇获得25M总线                 
  REFDV = 5;                     
  PLLCTL = 192;
  PLLCTL_PLLON = 1;                    
  while(!CRGFLG_LOCK);              
  CLKSEL_PLLSEL = 1;                   
/*----------------------------------------PWM初始化---------------*/
PWMPOL=0x07;           //PWM输出，改变PWMDTY* 则改变占空比  //极性选择，开始为高
PWMPRCLK=0x33;       //时钟A，B预分频，当20M总线时 clock A=2.5M,clock B=2.5M  
PWMCLK_PCLK0=1;      //对通道0用时钟clock SA
PWMSCLA=15;          //clock SA=2.5M/（2*15）=83.33K
PWMPER0=250;PWMDTY0=0; //通道0的周期为333Hz     
PWMPER1=250;PWMDTY1=0; //通道0的周期为10KHz      
PWMPER2=250;PWMDTY2=0; //通道0的周期为10KHz      

  /* put your own code here */
 PWMDTY0=62;	 //PWM输出，通道0输出周期为333Hz,占空比为25％的波形
 PWMDTY1=125; //PWM输出，通道1输出周期为10KHz,占空比为50％的波形
 PWMDTY2=187;	 //PWM输出，通道2输出周期为10KHz,占空比为75％的波形

PWME=0xff;  


}	
void main(void) {
InitialRegs();
  /* put your own code here */
  EnableInterrupts;
  for(;;) {
  } /* wait forever */
}