audcpserver.cfg

达芬奇平台上面的codec server 搭建和音频处理的搭建

/*
 *  Copyright 2006 by Texas Instruments Incorporated.
 *
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *
 */

/* set up OSAL */
var osalGlobal = xdc.useModule('ti.sdo.ce.osal.Global');
osalGlobal.runtimeEnv = osalGlobal.DSPLINK_BIOS;

/* activate BIOS logging module */
var LogServer = xdc.useModule('ti.sdo.ce.bioslog.LogServer');

/* get various codec modules; i.e., implementation of codecs */
var audioCopy = xdc.useModule('audcp_codec.AUDCP');

/*
 *  ======== Server Configuration ========
 */
var Server = xdc.useModule('ti.sdo.ce.Server');
Server.threadAttrs.stackSize = 2048;
Server.threadAttrs.priority = Server.MINPRI;

// name is "audcp" here but it can be anything.
Server.algs = [
    {name: "audcp", mod: audioCopy, threadAttrs: {
        stackSize: 4096, stackMemId: 0, priority: Server.MINPRI + 1}
    },
];

/*
 * Note that we presume this server runs on a system with DSKT2 and DMAN3,
 * so we configure those modules here.
 */

/* we can use DMA in certain codecs! */
//AUDCP.useDMA = true;

/*
 *  ======== DSKT2 (XDAIS Alg. memory alocation ) configuration ========
 */
var DSKT2 = xdc.useModule('ti.sdo.fc.dskt2.DSKT2');
DSKT2.DARAM0     = "DDRALGHEAP";
DSKT2.DARAM1     = "DDRALGHEAP";
DSKT2.DARAM2     = "DDRALGHEAP";
DSKT2.SARAM0     = "DDRALGHEAP";
DSKT2.SARAM1     = "DDRALGHEAP";
DSKT2.SARAM2     = "DDRALGHEAP";
DSKT2.ESDATA     = "DDRALGHEAP";
DSKT2.IPROG      = "DDRALGHEAP";
DSKT2.EPROG      = "DDRALGHEAP";
DSKT2.DSKT2_HEAP = "DDR";

/*
 * None of the copy codecs use scratch, but this example shows how to reserve
 * 1 kB of DARAM and SARAM for scratch group 0.
 */
DSKT2.DARAM_SCRATCH_SIZES = [ 1024, 0, 0, 0, 0, 0, 0, 0, 0, 0,
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0];
DSKT2.SARAM_SCRATCH_SIZES = [ 1024, 0, 0, 0, 0, 0, 0, 0, 0, 0,
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0];

/*
 *  ======== DMAN3 (DMA manager) configuration ========
 *  We assume PaRams 0..95 are taken by the Arm drivers. We reserve
 *  all the rest, up to 127 (there are 128 PaRam sets on DM6446).
 *  DMAN3 takes TCC's 32 through 63 (hence the High TCC mask is 0xFFFFFFFF
 *  and the Low TCC mask is 0).
 */
var DMAN3 = xdc.useModule('ti.sdo.fc.dman3.DMAN3');
DMAN3.heapInternal = "L1DHEAP";
DMAN3.heapExternal = "DDR";

DMAN3.paRamBaseIndex     = 96;
DMAN3.numPaRamEntries    = 32;
DMAN3.tccAllocationMaskH = 0xffffffff;
DMAN3.tccAllocationMaskL = 0x00000000;

Program.main = Program.system = null;
/*
 *  @(#) codec_engine_1_02 1,0,0,147 7-14-2006 ce-d14
*/