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--BCD 8位转12
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY BCD IS
PORT (V:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
HB,LB:BUFFER STD_LOGIC_VECTOR(11 DOWNTO 0);
BVALUE:BUFFER STD_LOGIC_VECTOR(11 DOWNTO 0);
BCD_LMD: OUT STD_LOGIC_VECTOR(11 DOWNTO 0));
END BCD;
ARCHITECTURE A OF BCD IS
signal ad_d : std_logic_vector(11 downto 0);
BEGIN
P1:PROCESS(V(7 DOWNTO 4))
BEGIN
--A/D输出高4位转换 分辨率0.32V
if V(7 DOWNTO 4)="1111" then HB<="010010000000"; --4.80V
ELSIF V(7 DOWNTO 4)= "1110" THEN HB<="010001001000";--4.48V
ELSIF V(7 DOWNTO 4)= "1101" THEN HB<="010000010110";--4.16V
ELSIF V(7 DOWNTO 4)= "1100" THEN HB<="001110000100";--3.84V
ELSIF V(7 DOWNTO 4)= "1011" THEN HB<="001101010010";--3.52V
ELSIF V(7 DOWNTO 4)= "1010" THEN HB<="001100100000";--3.20V
ELSIF V(7 DOWNTO 4)= "1001" THEN HB<="001010001000";--2.88V
ELSIF V(7 DOWNTO 4)= "1000" THEN HB<="001001010110";--2.56V
ELSIF V(7 DOWNTO 4)= "0111" THEN HB<="001000100100";--2.24V
ELSIF V(7 DOWNTO 4)= "0110" THEN HB<="000110010010";--1.92V
ELSIF V(7 DOWNTO 4)= "0101" THEN HB<="000101100000";--1.60V
ELSIF V(7 DOWNTO 4)= "0100" THEN HB<="000100101000";--1.28V
ELSIF V(7 DOWNTO 4)= "0011" THEN HB<="000010010110";--0.96V
ELSIF V(7 DOWNTO 4)= "0010" THEN HB<="000001100100";--0.64V
ELSIF V(7 DOWNTO 4)= "0001" THEN HB<="000000110010";--0.32V
ELSIF V(7 DOWNTO 4)= "0000" THEN HB<="000000000000";--0.00V
ELSE HB<="000000000000" ; --0.00V
END IF;
END PROCESS P1;
P2:PROCESS(V(3 DOWNTO 0))
BEGIN --A/D输出低4位转换 分辨率0.02V
if V(3 DOWNTO 0)= "1111" then LB<="000000110000"; --0.30V
ELSIF V(3 DOWNTO 0)= "1110" THEN LB<="000000101000";--0.28V
ELSIF V(3 DOWNTO 0)= "1101" THEN LB<="000000100110";--0.26V
ELSIF V(3 DOWNTO 0)= "1100" THEN LB<="000000100100";--0.24V
ELSIF V(3 DOWNTO 0)= "1011" THEN LB<="000000100010";--0.22V
ELSIF V(3 DOWNTO 0)= "1010" THEN LB<="000000100000";--0.20V
ELSIF V(3 DOWNTO 0)= "1001" THEN LB<="000000011000";--0.18V
ELSIF V(3 DOWNTO 0)= "1000" THEN LB<="000000010110";--0.16V
ELSIF V(3 DOWNTO 0)= "0111" THEN LB<="000000010100";--0.14V
ELSIF V(3 DOWNTO 0)= "0110" THEN LB<="000000010010";--0.12V
ELSIF V(3 DOWNTO 0)= "0101" THEN LB<="000000010000";--0.10V
ELSIF V(3 DOWNTO 0)= "0100" THEN LB<="000000001000";--0.08V
ELSIF V(3 DOWNTO 0)= "0011" THEN LB<="000000000110";--0.06V
ELSIF V(3 DOWNTO 0)= "0010" THEN LB<="000000000100";--0.04V
ELSIF V(3 DOWNTO 0)= "0001" THEN LB<="000000000010";--0.02V
ELSIF V(3 DOWNTO 0)= "0000" THEN LB<="000000000000";--0.00V
ELSE LB<="000000000000"; --0V
END IF;
END PROCESS P2;
BVALUE<=HB+LB;
P3:PROCESS(BVALUE)
VARIABLE JJ:STD_LOGIC_VECTOR(11 DOWNTO 0);
BEGIN
JJ:=BVALUE;
IF (JJ(3 DOWNTO 0)>"1001") THEN --如果12位结果中,低4位
JJ:=JJ+"000000000110"; --大于9 则低4位加6
END IF;
IF(JJ(7 DOWNTO 4)>"1001") THEN --如果中间的4位大于9
JJ:=JJ+"000001100000"; --则中4位加6
END IF;
ad_d(3 downto 0)<=JJ(3 DOWNTO 0);
ad_d(7 downto 4)<=JJ(7 DOWNTO 4);
ad_d(11 downto 8)<=JJ(11 DOWNTO 8);
END PROCESS P3;
BCD_LMD<=ad_d;
END A;
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