e-try.smp_dump.txt

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State Machine - |E-TRY|etester:inst8|state
Name state.wr_stop state.d_hold state.d_write state.d_setup1 state.d_setup state.start state.idle 
state.idle 0 0 0 0 0 0 0 
state.start 0 0 0 0 0 1 1 
state.d_setup 0 0 0 0 1 0 1 
state.d_setup1 0 0 0 1 0 0 1 
state.d_write 0 0 1 0 0 0 1 
state.d_hold 0 1 0 0 0 0 1 
state.wr_stop 1 0 0 0 0 0 1 

State Machine - |E-TRY|FPGA_7279:inst|state
Name state.finish state.shift_key_high1 state.shift_key_high state.shift_key_low state.shift_data_high state.shift_data_low state.next_delay state.shift_cmd_high state.shift_cmd_low state.start_delay state.start state.idle 
state.idle 0 0 0 0 0 0 0 0 0 0 0 0 
state.start 0 0 0 0 0 0 0 0 0 0 1 1 
state.start_delay 0 0 0 0 0 0 0 0 0 1 0 1 
state.shift_cmd_low 0 0 0 0 0 0 0 0 1 0 0 1 
state.shift_cmd_high 0 0 0 0 0 0 0 1 0 0 0 1 
state.next_delay 0 0 0 0 0 0 1 0 0 0 0 1 
state.shift_data_low 0 0 0 0 0 1 0 0 0 0 0 1 
state.shift_data_high 0 0 0 0 1 0 0 0 0 0 0 1 
state.shift_key_low 0 0 0 1 0 0 0 0 0 0 0 1 
state.shift_key_high 0 0 1 0 0 0 0 0 0 0 0 1 
state.shift_key_high1 0 1 0 0 0 0 0 0 0 0 0 1 
state.finish 1 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |E-TRY|FPGA_7279:inst|state1
Name state1.stop state1.start_wr state1.idle 
state1.idle 0 0 0 
state1.start_wr 0 1 1 
state1.stop 1 0 1