e-try.qsf

频率计编程 看看吧第一次先贴希望对大家有用

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		top_7279_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE EP1C12Q240C8
set_global_assignment -name TOP_LEVEL_ENTITY E-TRY
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "6.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "03:33:47  APRIL 12, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 5.1
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE EPCS4
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_global_assignment -name DEVICE_MIGRATION_LIST "EP1C12Q240C8,EP1C6Q240C8"

set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_location_assignment PIN_134 -to CLK20us1
set_global_assignment -name VHDL_FILE DIV.vhd
set_global_assignment -name VHDL_FILE FPGA_7279.vhd
set_global_assignment -name BDF_FILE "E-TRY.bdf"
set_global_assignment -name VHDL_FILE Test_Controller.vhd

set_location_assignment PIN_131 -to SYS_RESET_N
set_location_assignment PIN_153 -to SYS_CLOCK
set_location_assignment PIN_128 -to FLASH_A[0]
set_location_assignment PIN_115 -to FLASH_A[1]
set_location_assignment PIN_114 -to FLASH_A[2]
set_location_assignment PIN_141 -to CS_8019
set_location_assignment PIN_156 -to clk7279
set_location_assignment PIN_132 -to cs7279
set_location_assignment PIN_159 -to key7279
set_location_assignment PIN_165 -to out7279[0]
set_location_assignment PIN_166 -to out7279[1]
set_location_assignment PIN_167 -to out7279[2]
set_location_assignment PIN_168 -to out7279[3]
set_location_assignment PIN_153 -to sys_clk
set_location_assignment PIN_131 -to SYS_RST_N
set_location_assignment PIN_158 -to DAT7279
set_location_assignment PIN_98 -to AD_CLK500K
set_global_assignment -name VHDL_FILE bcdzhuanhuan.vhd
set_global_assignment -name VHDL_FILE etester.vhd
set_location_assignment PIN_86 -to tclk
set_location_assignment PIN_88 -to start1
set_global_assignment -name VHDL_FILE DIV5000.vhd
set_location_assignment PIN_94 -to aa
set_location_assignment PIN_83 -to ena
set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform1.vwf