e-try.fit.rpt

频率计编程 看看吧第一次先贴希望对大家有用

; Weak Pull-Up Resistor                                ; Off                            ; Off                            ;
; Enable Bus-Hold Circuitry                            ; Off                            ; Off                            ;
; Auto Global Memory Control Signals                   ; Off                            ; Off                            ;
; Auto Packed Registers -- Cyclone                     ; Auto                           ; Auto                           ;
; Auto Delay Chains                                    ; On                             ; On                             ;
; Auto Merge PLLs                                      ; On                             ; On                             ;
; Perform Physical Synthesis for Combinational Logic   ; Off                            ; Off                            ;
; Perform Register Duplication                         ; Off                            ; Off                            ;
; Perform Register Retiming                            ; Off                            ; Off                            ;
; Perform Asynchronous Signal Pipelining               ; Off                            ; Off                            ;
; Fitter Effort                                        ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                      ; Normal                         ; Normal                         ;
; Logic Cell Insertion - Logic Duplication             ; Auto                           ; Auto                           ;
; Auto Register Duplication                            ; Off                            ; Off                            ;
; Auto Global Clock                                    ; On                             ; On                             ;
; Auto Global Register Control Signals                 ; On                             ; On                             ;
+------------------------------------------------------+--------------------------------+--------------------------------+


+--------------------------------------------------------------------+
; Fitter Device Options                                              ;
+----------------------------------------------+---------------------+
; Option                                       ; Setting             ;
+----------------------------------------------+---------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off                 ;
; Enable device-wide reset (DEV_CLRn)          ; Off                 ;
; Enable device-wide output enable (DEV_OE)    ; Off                 ;
; Enable INIT_DONE output                      ; Off                 ;
; Configuration scheme                         ; Active Serial       ;
; Error detection CRC                          ; Off                 ;
; Reserve ASDO pin after configuration.        ; As input tri-stated ;
; Reserve all unused pins                      ; As input tri-stated ;
; Base pin-out file on sameframe device        ; Off                 ;
+----------------------------------------------+---------------------+


+------------------+
; Fitter Equations ;
+------------------+
The equations can be found in C:/Users/wear/Desktop/E-TRY(frequency)/E-TRY.fit.eqn.


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in C:/Users/wear/Desktop/E-TRY(frequency)/E-TRY.pin.


+----------------------------------------------------------------------+
; Fitter Resource Usage Summary                                        ;
+---------------------------------------------+------------------------+
; Resource                                    ; Usage                  ;
+---------------------------------------------+------------------------+
; Total logic elements                        ; 136 / 12,060 ( 1 % )   ;
;     -- Combinational with no register       ; 41                     ;
;     -- Register only                        ; 8                      ;
;     -- Combinational with a register        ; 87                     ;
;                                             ;                        ;
; Logic element usage by number of LUT inputs ;                        ;
;     -- 4 input functions                    ; 44                     ;
;     -- 3 input functions                    ; 26                     ;
;     -- 2 input functions                    ; 53                     ;
;     -- 1 input functions                    ; 8                      ;
;     -- 0 input functions                    ; 5                      ;
;                                             ;                        ;
; Logic elements by mode                      ;                        ;
;     -- normal mode                          ; 100                    ;
;     -- arithmetic mode                      ; 36                     ;
;     -- qfbk mode                            ; 10                     ;
;     -- register cascade mode                ; 0                      ;
;     -- synchronous clear/load mode          ; 54                     ;
;     -- asynchronous clear/load mode         ; 64                     ;
;                                             ;                        ;
; Total LABs                                  ; 22 / 1,206 ( 2 % )     ;
; Logic elements in carry chains              ; 39                     ;
; User inserted logic elements                ; 0                      ;
; Virtual pins                                ; 0                      ;
; I/O pins                                    ; 22 / 173 ( 13 % )      ;
;     -- Clock pins                           ; 1 / 2 ( 50 % )         ;
; Global signals                              ; 3                      ;
; M4Ks                                        ; 0 / 52 ( 0 % )         ;
; Total memory bits                           ; 0 / 239,616 ( 0 % )    ;
; Total RAM block bits                        ; 0 / 239,616 ( 0 % )    ;
; PLLs                                        ; 0 / 2 ( 0 % )          ;
; Global clocks                               ; 3 / 8 ( 38 % )         ;
; Maximum fan-out node                        ; SYS_RST_N              ;
; Maximum fan-out                             ; 74                     ;
; Highest non-global fan-out signal           ; div:inst7|LessThan~598 ;
; Highest non-global fan-out                  ; 26                     ;
; Total fan-out                               ; 629                    ;
; Average fan-out                             ; 3.93                   ;
+---------------------------------------------+------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Input Pins                                                                                                                                                                                                                                                      ;
+-----------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+