reportgen.log

This Circuit generates the syndrome for the CRC. This is quite useful for transmision purposes and e

Release 7.1i reportgen H.38
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

Bull::  Sat Jan 10 19:58:57 2009

C:/Xilinx/bin/nt/reportgen.exe -delay -intstyle ise -o crc crc.ncd 

Loading device for application Rf_Device from file '3s400.nph' in environment
C:/Xilinx.
   "crc" is an NCD, version 3.1, device xc3s400, package ft256, speed -4
ReportGen:LoadDesign: 'crc.ncd'
Initializing temperature to 85.000 Celsius. (default - Range: 0.000 to 85.000
Celsius)
Initializing voltage to 1.140 Volts. (default - Range: 1.140 to 1.260 Volts)
Device speed data version:  "PRODUCTION 1.35 2005-01-22".

Generating Delay Report: crc.dly


   The Delay Summary Report


The NUMBER OF SIGNALS NOT COMPLETELY ROUTED for this design is: 0

   The AVERAGE CONNECTION DELAY for this design is:        1.455
   The MAXIMUM PIN DELAY IS:                               3.922
   The AVERAGE CONNECTION DELAY on the 10 WORST NETS is:   2.158

   Listing Pin Delays by value: (nsec)

    d < 1.00   < d < 2.00  < d < 3.00  < d < 4.00  < d < 5.00  d >= 5.00
   ---------   ---------   ---------   ---------   ---------   ---------
          14          27          11           2           0           0


**************************
Generating Clock Report
**************************

+---------------------+--------------+------+------+------------+-------------+
|        Clock Net    |   Resource   |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|
+---------------------+--------------+------+------+------------+-------------+
|         reloj_BUFGP |      BUFGMUX3| No   |   10 |  0.019     |  1.033      |
+---------------------+--------------+------+------+------------+-------------+


Number of error messages: 0
Number of warning messages: 0
Number of info messages: 0

reportgen done!