flash_mtd.amd.c

MTK debug flash 兼容性的code

/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2005
*
*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
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*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
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/*****************************************************************************
 *
 * Filename:
 * ---------
 *    flash_mtd.amd.c
 *
 * Project:
 * --------
 *   Maui
 *
 * Description:
 * ------------
 *   This is flash MTD driver for AMD series devices.
 *
 * Author:
 * -------
 * -------
 *
 *============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
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/********************************************************/
/*                  Include Header Files                */
/********************************************************/
#include "custom_MemoryDevice.h"
#include "flash_opt.h"
#include "flash_mtd.h"
#include "reg_base.h"

#if defined(__SINGLE_BANK_NOR_FLASH_SUPPORT__)
#include "intrCtrl.h"
#include "drv_comm.h"
#include "gpio_hw.h"
#include "gpio_sw.h"
#endif /*__SINGLE_BANK_NOR_FLASH_SUPPORT__*/
#include <stdio.h>



/********************************************************************************************
 * !!CAUTION!!
 * No matter what kinds of modifications are made in this file, corresponding verifications 
 * are required on both multiple and single bank devices.
 * For example, sanity test should be passed on both Crystal25V3 and Crystal25V3SB projects.
 ********************************************************************************************/

/* Global reclaration */
extern kal_uint32 INT_RetrieveFlashBaseAddr(void);
void WaitReady_AMD(kal_uint32 addr,kal_uint16 data);

extern kal_uint32 NOR_Flash_Base_Address;
extern kal_uint32 NOR_FDM_MARK_COPY;
extern const kal_uint32 NOR_FDM_MARK;

#if defined(__MAUI_BASIC__) && defined(__SINGLE_BANK_NOR_FLASH_SUPPORT__)

extern kal_uint8 IRQCode2Line[];
extern kal_uint32 NOR_Flash_Base_Address;

#if defined(MT6205B)
kal_uint32 g_savedMask;
#endif

#if (defined(MT6205B) || defined(MT6223) || defined(MT6223P) || defined(MT6223B))
#define TEST_IRQ_CODE (IRQ_SIM_CODE) /* SIM is not enabled in basic load */
#else
#define TEST_IRQ_CODE (IRQ_NFI_CODE) /* NFI should be free in single bank environment */
#endif

void NORTestLISR(void)
{
   extern NOR_FLASH_DRV_Data  FlashDriveData;
   NOR_Flash_MTD_Data *mtd_data = (NOR_Flash_MTD_Data *)FlashDriveData.MTDData;
   static trigger_count = 0;
   volatile kal_uint32* ram_ptr = 0;
   volatile kal_uint32* rom_ptr = (volatile kal_uint32 *)mtd_data->CurrAddr;
   /* check whether the flash is in ready state */
   ASSERT(~(mtd_data->Signature) == ((kal_uint32)mtd_data->RegionInfo));

   if( (ram_ptr[0] != rom_ptr[0]) || (ram_ptr[1] != rom_ptr[1]) || 
       (ram_ptr[2] != rom_ptr[2]) || (ram_ptr[3] != rom_ptr[3]) )
       EXT_ASSERT(0,0,0,0);
   trigger_count++;
   IRQClearInt(TEST_IRQ_CODE);
}

static void insertTestLISR(void)
{
   IRQ_Register_LISR(TEST_IRQ_CODE, NORTestLISR,"FAKE NFI");
   IRQSensitivity(TEST_IRQ_CODE,LEVEL_SENSITIVE);
   IRQUnmask(TEST_IRQ_CODE);
}

static void triggerTestIRQ(void)
{
   kal_uint8 line;
   kal_uint32 irq_mask = 0;

   irq_mask = DisableIRQ();
   line = IRQCode2Line[TEST_IRQ_CODE];
   *IRQ_SOFT = line;
   RestoreIRQ(irq_mask);
}
#endif /*__MAUI_BASIC__ && __SINGLE_BANK_NOR_FLASH_SUPPORT__*/

#ifdef __AMD_SERIES_NOR__

/* ************************************************************
         SPANSION(AMD) NOR FLASH MTD Flash Driver
   ************************************************************ */

#ifdef __PAGE_BUFFER_PROGRAM__
   extern kal_uint32 PAGE_BUFFER_SIZE;
#endif

#ifdef __SPANSION_PL_N__
   extern kal_uint32 INT_GetCurrentTime(void);
#endif

static int CheckDeviceReady_AMD(void * DriveData, kal_uint32 BlockIndex);
#ifdef __SPANSION_NS_N__
static void DYBCMD_AMD(volatile FLASH_CELL *fp, kal_uint32 ActionFlag);
#endif
/*-----------------------------------*/
#ifndef __NOR_FDM5__
static int MountDevice_AMD(void * DriveData, void *Info)
{
   NOR_MTD_FlashInfo * FlashInfo=Info;
   NOR_Flash_MTD_Data * D = DriveData;
   kal_uint32 i, MaxBlockSize = 0;

#if defined(__SINGLE_BANK_NOR_FLASH_SUPPORT__) && defined( __MULTI_BANK_NOR_DEVICE__)
   kal_uint32 TotalSize_Block = 0;
   kal_uint32 TotalSize_Bank = 0;
#endif

   i = 0;
   FlashInfo->TotalBlocks = 0;
   

   
   while(D->RegionInfo[i].BlockSize != 0)
   {
      FlashInfo->BlockSize[i] = D->RegionInfo[i].BlockSize;
      FlashInfo->RegionBlocks[i] = D->RegionInfo[i].RegionBlocks;
      FlashInfo->TotalBlocks += D->RegionInfo[i].RegionBlocks;
#if defined(__SINGLE_BANK_NOR_FLASH_SUPPORT__) && defined( __MULTI_BANK_NOR_DEVICE__)
      TotalSize_Block += D->RegionInfo[i].BlockSize * D->RegionInfo[i].RegionBlocks;
#endif

      if(D->RegionInfo[i].BlockSize > MaxBlockSize)
         MaxBlockSize = D->RegionInfo[i].BlockSize;
      i++;
   }
   
   FlashInfo->ActualRegionNum = i;
   
#if defined(__SINGLE_BANK_NOR_FLASH_SUPPORT__) && defined( __MULTI_BANK_NOR_DEVICE__)

      /*check customization */
   i=0;
   while(D->BankInfo[i].BankSize != 0)
   {
      TotalSize_Bank += D->BankInfo[i].BankSize * D->BankInfo[i].Banks;
      i++;
   }
   EXT_ASSERT(TotalSize_Bank==TotalSize_Block,0,0,0);   
   
#endif    
   
   return FS_NO_ERROR;
}
#endif

/* loop count for time measurement */
#if defined(MCU_13M)
/* 1T ~= 77 ns */
#define COUNTER_50US (325)
#define COUNTER_20US (130)
#define COUNTER_15US (97)
#define COUNTER_10US (65)
#define COUNTER_05US (32)

#elif defined(MCU_26M)
/* 1T ~= 38 ns */
#define COUNTER_50US (658)
#define COUNTER_20US (263)
#define COUNTER_15US (197)
#define COUNTER_10US (132)
#define COUNTER_05US (66)

#elif defined(MCU_52M)
/* 1T ~= 19 ns */
#define COUNTER_50US (1316)
#define COUNTER_20US (526)
#define COUNTER_15US (395)
#define COUNTER_10US (263)
#define COUNTER_05US (132)

#elif defined(MCU_104M)
/* 1T ~= 9.6 ns */
#define COUNTER_50US (2604)
#define COUNTER_20US (1042)
#define COUNTER_15US (781)
#define COUNTER_10US (521)
#define COUNTER_05US (260)

#else

#error "Unsupported MCU clock rate for single bank support V2!"

#endif

#define CHECK_LOG_START(a) 
#define CHECK_LOG_STOP(a) 
/*-----------------------------------*/
#if defined(__SINGLE_BANK_NOR_FLASH_SUPPORT__)

/*
 * Following global variables should be modified only when I-bit is disabled
 */
extern kal_bool NOR_FLASH_BUSY;
extern kal_bool NOR_FLASH_SUSPENDED;

#if defined(MT6205B)
extern kal_uint32 SNOR_IRQ_STATUS;
kal_uint32 snor_check_irq_soft;
#endif

#if defined(LA_TRIGGER_DEBUG)

#define LA_TRIGGER_PIN (43)