📄 bootarm.s
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LDR a2,AMD_ENTER_CFI_DATA
STRH a2,[a1];flash_base[555]=0xaa
LDR a1,AMD_CFI_SECOND_ADDR
LDR a2,AMD_CFI_SECOND_DATA
STRH a2,[a1];flash_base[2aa]=0x55
LDR a1,AMD_CFI_THIRD_ADDR
LDR a2,AMD_CFI_THIRD_DATA
STRH a2,[a1];flash_base[555]=0x90
LDR a1,AMD_MANUFACTURE_CODE_ADDR ; Read ID
LDRH a2,[a1]
LDR a1,MANUFACTURE_CODE
STR a2,[a1]
LDR a1,AMD_DEV_CODE_ADDR
LDRH a2,[a1]
LDR a1,DEV_CODE
STR a2,[a1]
LDR a1,AMD_EXTDEV1_CODE_ADDR
LDRH a2,[a1]
LDR a1,EXTDEV1_CODE
STR a2,[a1]
LDR a1,AMD_EXTDEV2_CODE_ADDR
LDRH a2,[a1]
LDR a1,EXTDEV2_CODE
STR a2,[a1]
LDR a1,AMD_RESET_ADDR
LDR a2,AMD_RESET_DATA
STRH a2,[a1];reset flash flash_base[00]=0xf0
LDR PC,RETURN_BOOT
RETURN_BOOT
DCD FINISH_READID
IF REMAPPING
AMD_RESET_ADDR
DCD 0x08000000
AMD_ENTER_CFI_ADDR
DCD 0X08000AAA ;Word address
AMD_CFI_SECOND_ADDR
DCD 0X08000554
AMD_CFI_THIRD_ADDR
DCD 0X08000AAA
AMD_MANUFACTURE_CODE_ADDR
DCD 0X08000000
AMD_DEV_CODE_ADDR
DCD 0X08000002
AMD_EXTDEV1_CODE_ADDR
DCD 0X0800001C
AMD_EXTDEV2_CODE_ADDR
DCD 0X0800001E
ELSE
AMD_RESET_ADDR
DCD 0x00000000
AMD_ENTER_CFI_ADDR
DCD 0X00000AAA
AMD_CFI_SECOND_ADDR
DCD 0X00000554
AMD_CFI_THIRD_ADDR
DCD 0X00000AAA
AMD_MANUFACTURE_CODE_ADDR
DCD 0X00000000
AMD_DEV_CODE_ADDR
DCD 0X00000002
AMD_EXTDEV1_CODE_ADDR
DCD 0X0000001C
AMD_EXTDEV2_CODE_ADDR
DCD 0X0000001E
ENDIF
AMD_RESET_DATA
DCD 0XF0
AMD_ENTER_CFI_DATA
DCD 0XAA
AMD_CFI_SECOND_DATA
DCD 0X55
AMD_CFI_THIRD_DATA
DCD 0X90
INTEL_RESET_DATA
DCD 0XFF
INTEL_CLEN_STAT_DATA
DCD 0X50
INTEL_READ_CMD_DATA
DCD 0X90
MANUFACTURE_CODE
DCD 0X80030100;dma adress
DEV_CODE
DCD 0X80030200
EXTDEV1_CODE
DCD 0X80030104
EXTDEV2_CODE
DCD 0X80030204
NOP
ReadIDEnd
NOP
;
;
;/*************************************************************************/
;/* */
;/* FUNCTION */
;/* */
;/* INT_Setup_Vector */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function sets up the specified vector with the new vector */
;/* value. The previous vector value is returned to the caller. */
;/* */
;/* */
;/* CALLED BY */
;/* */
;/* Application */
;/* TCC_Register_LISR Register LISR for vector */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* INPUTS */
;/* */
;/* vector Vector number to setup */
;/* new Pointer to new assembly */
;/* language ISR */
;/* */
;/* OUTPUTS */
;/* */
;/* old vector contents */
;/* */
;/*************************************************************************/
;VOID *INT_Setup_Vector(INT vector, VOID *new)
;{
EXPORT INT_Setup_Vector
INT_Setup_Vector
;
;VOID *old_vector; /* Old interrupt vector */
;VOID **vector_table; /* Pointer to vector table */
;
; /* Calculate the starting address of the actual vector table. */
; vector_table = (VOID **) 0;
;
; /* Pickup the old interrupt vector. */
; old_vector = vector_table[vector];
;
; /* Setup the new interrupt vector. */
; vector_table[vector] = new;
;
; /* Return the old interrupt vector. */
; return(old_vector);
;
ADR a3,INT_Table ; Get the address of our table
LDR a4,[a3,a1,LSL #2] ; Make sure we are pointing to
; the right vector
STR a2,[a3,a1,LSL #2] ; Store the new isr
MOV a1,a4 ; Setup return parameter
[ THUMB
BX lr ; Return to caller
|
MOV pc,lr ; Return to caller
]
;}
;
;/*************************************************************************/
;/* */
;/* FUNCTION */
;/* */
;/* INT_Vectors_Loaded */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function returns the flag that indicates whether or not */
;/* all the default vectors have been loaded. If it is false, */
;/* each LISR register also loads the ISR shell into the actual */
;/* vector table. */
;/* */
;/* CALLED BY */
;/* */
;/* TCC_Register_LISR Register LISR for vector */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* INPUTS */
;/* */
;/* None */
;/* */
;/* OUTPUTS */
;/* */
;/* None */
;/* */
;/*************************************************************************/
;INT INT_Vectors_Loaded(void)
;{
EXPORT INT_Vectors_Loaded
INT_Vectors_Loaded
;
; /* Just return the loaded vectors flag. */
; return(INT_Loaded_Flag);
;
LDR a1, Loaded_Flag
LDR a1,[a1,#0] ; Load current value
[ THUMB
BX lr ; Return to caller
|
MOV pc,lr ; Return to caller
]
;}
;
;/*************************************************************************/
;/* */
;/* FUNCTION */
;/* */
;/* INT_Retrieve_Shell */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function retrieves the pointer to the shell interrupt */
;/* service routine. The shell interrupt service routine calls */
;/* the LISR dispatch routine. */
;/* */
;/* CALLED BY */
;/* */
;/* TCC_Register_LISR Register LISR for vector */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* INPUTS */
;/* */
;/* vector Vector number to setup */
;/* */
;/* OUTPUTS */
;/* */
;/* shell pointer */
;/* */
;/*************************************************************************/
;VOID *INT_Retrieve_Shell(INT vector)
;{
EXPORT INT_Retrieve_Shell
INT_Retrieve_Shell
;
; /* Return the LISR Shell interrupt routine. */
; return(INT_Vectors[vector]);
;
ADR a2,INT_Table ; Get address of our table
LDR a1,[a2,a1,LSL #2] ; Make sure we have correct isr
[ THUMB
BX lr ; Return to caller
|
MOV pc,lr ; Return to caller
]
;}
;/* single bank support */
IF :LNOT:SINGLE_BANK_SUPPORT
FIQ_RETURN_PTR
DCD processing_fiqlr
INT_FIQ_Parse
IF KAL_ON_NUCLEUS
STMDB sp!, {a2}
MRS a2, SPSR
TST a2, #F_BIT
LDMIA sp!, {a2}
SUBNES PC,lr,#4
STMDB sp!,{a1-a4} ; Save a1-a4 on temporary FIQ stack
SUB a4,lr,#4 ; Save IRQ's lr (return address)
LDR a1, FIQ_RETURN_PTR
STR a4, [a1] ; Save IRQ's return address to global variable.
BL TCT_Interrupt_Context_Save ; Call context save routine
BL INT_FIQ_Lisr
B TCT_Interrupt_Context_Restore
ELSE
STMDB sp!, {a2}
MRS a2, SPSR
TST a2, #F_BIT
LDMIA sp!, {a2}
SUBNES PC,lr,#4
STMDB sp!,{a1,a4} ; Save a1 and a4 on temporary FIQ stack
SUB a4,lr,#4 ; Save IRQ's lr (return address)
LDR a1, FIQ_RETURN_PTR
STR a4, [a1] ; Save IRQ's return address to global variable.
LDMIA sp!,{a1,a4} ; Restore a1 and a4
BL INT_FIQ_Lisr
int_fiq_busy_loop
B int_fiq_busy_loop
ENDIF
Default_ISR
SUBS pc,lr,#4
;
;/*************************************************************************/
;/* The following section contains the remaining interrupt handlers. */
;/* Place you Interrupt Service routine at the appropriate label. */
;/* For IRQ, you can use Nucleus PLUS call to NU_Register_LISR */
;/* setup up an interrupt service routine. */
;/*************************************************************************/
SYSTEM_FATAL_ERROR
DCD stack_system_error
Undef_Instr_ISR
MOV a1,#UNDEF_EXCEPTION_TYPE ; Set type UND_ISR (1)
MOV a2,lr
B saveException
SWI_ISR
MOV a1,#SWI_EXCEPTION_TYPE ; Set type SWI_ISR (2)
MOV a2,lr
B saveException
Prefetch_Abort_ISR
MOV a1,#PREFETCH_EXCEPTION_TYPE ; Set type ABORT_ISR (3)
MOV a2,lr
B saveException
Data_Abort_ISR
MOV a1,#DATA_EXCEPTION_TYPE ; Set type DATA_ABORT (4)
MOV a2,lr
saveException
MRS a3,CPSR ; Pickup current CPSR
BIC a3,a3,#MODE_MASK ; Clear the mode bits
ORR a3,a3,#SUP_MODE ; Prepare to switch to supervisor mode (SVC)
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