📄 lesson10.lst
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DC 9220 007A STS 0x007A,R2
(0090) //delay(100);
(0091)
(0092)
(0093) ADCSRA |=BIT(ADSC); //开始转换第二次，第一次的不准确
DE 9180 007A LDS R24,0x007A
E0 6480 ORI R24,0x40
E1 9380 007A STS 0x007A,R24
(0094)
(0095) while(!(ADCSRA&(1<<ADIF)));
E3 9020 007A LDS R2,0x007A
E5 FE24 SBRS R2,4
E6 CFFC RJMP 0x00E3
(0096)
(0097) //while(ADCSRA&(1<<ADSC)); //为1等待
(0098) adcL=ADCL;
E7 9020 0078 LDS R2,0x0078
E9 9220 0105 STS adcL,R2
(0099) adcH=ADCH;
EB 9020 0079 LDS R2,0x0079
ED 9220 0104 STS adcH,R2
(0100) ADCSRA |=BIT(1<<ADIF);
EF E110 LDI R17,0x10
F0 E001 LDI R16,1
F1 D0D4 RCALL lsl8
F2 9020 007A LDS R2,0x007A
F4 2A20 OR R2,R16
F5 9220 007A STS 0x007A,R2
(0101)
(0102) uart_sendB(adcH);
F7 9100 0104 LDS R16,adcH
F9 DF8A RCALL _uart_sendB
(0103) uart_sendB(adcL);
FA 9100 0105 LDS R16,adcL
FC DF87 RCALL _uart_sendB
(0104)
(0105) //****************************************************
(0106) ADMUX = 0x47; //选择AVCC为参考,采集电压右对齐 7通道
FD E487 LDI R24,0x47
FE 9380 007C STS 0x007C,R24
(0107) //delay(100);
(0108) ADCSRA =0x84; //0b11000100 8分频
100 E884 LDI R24,0x84
101 9380 007A STS 0x007A,R24
(0109) ADCSRA |=BIT(ADSC); //开始转换
103 9180 007A LDS R24,0x007A
105 6480 ORI R24,0x40
106 9380 007A STS 0x007A,R24
(0110)
(0111) while(!(ADCSRA&(1<<ADIF)));
108 9020 007A LDS R2,0x007A
10A FE24 SBRS R2,4
10B CFFC RJMP 0x0108
(0112)
(0113) //while(ADCSRA&(1<<ADSC)); //为1等待
(0114) adcL=ADCL;
10C 9020 0078 LDS R2,0x0078
10E 9220 0105 STS adcL,R2
(0115) adcH=ADCH;
110 9020 0079 LDS R2,0x0079
112 9220 0104 STS adcH,R2
(0116) ADCSRA |=BIT(1<<ADIF);
114 E110 LDI R17,0x10
115 E001 LDI R16,1
116 D0AF RCALL lsl8
117 9020 007A LDS R2,0x007A
119 2A20 OR R2,R16
11A 9220 007A STS 0x007A,R2
(0117)
(0118) //delay(100);
(0119)
(0120) ADCSRA |=BIT(ADSC); //开始转换
11C 9180 007A LDS R24,0x007A
11E 6480 ORI R24,0x40
11F 9380 007A STS 0x007A,R24
(0121)
(0122) while(!(ADCSRA&(1<<ADIF)));
121 9020 007A LDS R2,0x007A
123 FE24 SBRS R2,4
124 CFFC RJMP 0x0121
(0123)
(0124) //while(ADCSRA&(1<<ADSC)); //为1等待
(0125) adcL=ADCL;
125 9020 0078 LDS R2,0x0078
127 9220 0105 STS adcL,R2
(0126) adcH=ADCH;
129 9020 0079 LDS R2,0x0079
12B 9220 0104 STS adcH,R2
(0127) ADCSRA |=BIT(1<<ADIF);
12D E110 LDI R17,0x10
12E E001 LDI R16,1
12F D096 RCALL lsl8
130 9020 007A LDS R2,0x007A
132 2A20 OR R2,R16
133 9220 007A STS 0x007A,R2
(0128) //delay(100);
(0129)
(0130) uart_sendB(adcH);
135 9100 0104 LDS R16,adcH
137 DF4C RCALL _uart_sendB
(0131) uart_sendB(adcL);
FILE: <library>
138 9100 0105 LDS R16,adcL
13A DF49 RCALL _uart_sendB
13B CF7B RJMP 0x00B7
13C 9508 RET
div32u:
13D 94E8 BCLR 6
13E C001 RJMP 0x0140
mod32u:
13F 9468 BSET 6
140 D02F RCALL long_div_prolog
141 24CC CLR R12
142 C008 RJMP 0x014B
div32s:
143 94E8 BCLR 6
144 C001 RJMP 0x0146
mod32s:
145 9468 BSET 6
146 D029 RCALL long_div_prolog
147 FD37 SBRC R19,7
148 D074 RCALL neg32
149 FDB7 SBRC R27,7
14A D051 RCALL neg_R24_R27
14B 2477 CLR R7
14C 2488 CLR R8
14D 2499 CLR R9
14E 24AA CLR R10
14F 24BB CLR R11
150 D041 RCALL tst_R16_R19
151 F0C1 BEQ 0x016A
152 D044 RCALL tst_R24_R27
153 F0B1 BEQ 0x016A
154 E2E8 LDI R30,0x28
155 0F00 LSL R16
156 1F11 ROL R17
157 1F22 ROL R18
158 1F33 ROL R19
159 1C77 ROL R7
15A 1C88 ROL R8
15B 1C99 ROL R9
15C 1CAA ROL R10
15D 1CBB ROL R11
15E 1688 CP R8,R24
15F 0699 CPC R9,R25
160 06AA CPC R10,R26
161 06BB CPC R11,R27
162 F028 BCS 0x0168
163 1A88 SUB R8,R24
164 0A99 SBC R9,R25
165 0AAA SBC R10,R26
166 0ABB SBC R11,R27
167 9503 INC R16
168 95EA DEC R30
169 F759 BNE 0x0155
16A F426 BRTC 0x016F
16B 2D08 MOV R16,R8
16C 2D19 MOV R17,R9
16D 2D2A MOV R18,R10
16E 2D3B MOV R19,R11
16F C013 RJMP long_div_epilog
long_div_prolog:
170 927A ST R7,-Y
171 928A ST R8,-Y
172 929A ST R9,-Y
173 92AA ST R10,-Y
174 92BA ST R11,-Y
175 92CA ST R12,-Y
176 93EA ST R30,-Y
177 938A ST R24,-Y
178 939A ST R25,-Y
179 93AA ST R26,-Y
17A 93BA ST R27,-Y
17B 858B LDD R24,Y+11
17C 859C LDD R25,Y+12
17D 85AD LDD R26,Y+13
17E 85BE LDD R27,Y+14
17F 2EC3 MOV R12,R19
180 F00E BRTS 0x0182
181 26CB EOR R12,R27
182 9508 RET
long_div_epilog:
183 FCC7 SBRC R12,7
184 D038 RCALL neg32
185 91B9 LD R27,Y+
186 91A9 LD R26,Y+
187 9199 LD R25,Y+
188 9189 LD R24,Y+
189 91E9 LD R30,Y+
18A 90C9 LD R12,Y+
18B 90B9 LD R11,Y+
18C 90A9 LD R10,Y+
18D 9099 LD R9,Y+
18E 9089 LD R8,Y+
18F 9079 LD R7,Y+
190 9624 ADIW R28,4
191 9508 RET
tst_R16_R19:
192 2FE0 MOV R30,R16
193 2BE1 OR R30,R17
194 2BE2 OR R30,R18
195 2BE3 OR R30,R19
196 9508 RET
tst_R24_R27:
197 2FE8 MOV R30,R24
198 2BE9 OR R30,R25
199 2BEA OR R30,R26
19A 2BEB OR R30,R27
19B 9508 RET
neg_R24_R27:
19C 9580 COM R24
19D 9590 COM R25
19E 95A0 COM R26
19F 95B0 COM R27
1A0 5F8F SUBI R24,0xFF
1A1 4F9F SBCI R25,0xFF
1A2 4FAF SBCI R26,0xFF
1A3 4FBF SBCI R27,0xFF
1A4 9508 RET
push_xgsetF000:
1A5 937A ST R23,-Y
1A6 936A ST R22,-Y
1A7 935A ST R21,-Y
1A8 934A ST R20,-Y
1A9 9508 RET
pop_xgsetF000:
1AA 9149 LD R20,Y+
1AB 9159 LD R21,Y+
1AC 9169 LD R22,Y+
1AD 9179 LD R23,Y+
1AE 9508 RET
push_xgsetF00C:
1AF 937A ST R23,-Y
1B0 936A ST R22,-Y
1B1 935A ST R21,-Y
1B2 934A ST R20,-Y
1B3 92BA ST R11,-Y
1B4 92AA ST R10,-Y
1B5 9508 RET
pop_xgsetF00C:
1B6 90A9 LD R10,Y+
1B7 90B9 LD R11,Y+
1B8 9149 LD R20,Y+
1B9 9159 LD R21,Y+
1BA 9169 LD R22,Y+
1BB 9179 LD R23,Y+
1BC 9508 RET
neg32:
1BD 9500 COM R16
1BE 9510 COM R17
1BF 9520 COM R18
1C0 9530 COM R19
1C1 5F0F SUBI R16,0xFF
1C2 4F1F SBCI R17,0xFF
1C3 4F2F SBCI R18,0xFF
1C4 4F3F SBCI R19,0xFF
1C5 9508 RET
lsl8:
1C6 2311 TST R17
1C7 F019 BEQ 0x01CB
1C8 0F00 LSL R16
1C9 951A DEC R17
1CA CFFB RJMP lsl8
1CB 9508 RET
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