power.c

S3C2443 WINCE6.0 BSP

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
// -----------------------------------------------------------------------------
//
//      THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
//      ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
//      THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
//      PARTICULAR PURPOSE.
//
// -----------------------------------------------------------------------------
#include <windows.h>
#include <bsp.h>

#define Clear_FrameBuffer 0xA0100000

void InitTimer(void);
void ConfigStopGPIO(void);
void Write_LDI_LTV350(int address, int data);

VOID BSPPowerOff()
{
	volatile S3C2443_IOPORT_REG *pIOPort = (S3C2443_IOPORT_REG*)OALPAtoVA(S3C2443_BASE_REG_PA_IOPORT, FALSE);
	volatile S3C2443_ADC_REG *pADCPort = (S3C2443_ADC_REG*)OALPAtoVA(S3C2443_BASE_REG_PA_ADC, FALSE);
 	volatile S3C2443_RTC_REG *pRTCPort = (S3C2443_RTC_REG*)OALPAtoVA(S3C2443_BASE_REG_PA_RTC, FALSE);
 	volatile S3C2443_LCD_REG *pLCDPort = (S3C2443_LCD_REG*)OALPAtoVA(S3C2443_BASE_REG_PA_LCD, FALSE);
	volatile S3C2443_CLKPWR_REG *pCLKPWR = (S3C2443_CLKPWR_REG *)OALPAtoVA(S3C2443_BASE_REG_PA_CLOCK_POWER, FALSE);

	ULONG *FrameBufferPtr = (ULONG *)Clear_FrameBuffer;
	ULONG FrameBufferCount;
     
     //RETAILMSG(1,(TEXT("BSPPowerOff\n")));
	
	pRTCPort->RTCCON=0x0;   // R/W disable, 1/32768, Normal(merge), No reset
	pADCPort->ADCCON|=(1<<2);		// ADC StanbyMode

	// USB2.0 and PHY power
	pIOPort->MISCCR|=(1<<12); //USB port = suspend
	//pCLKPWR->USB_PHYPWR |= (0xf<<0);
	pCLKPWR->PWRCFG &= ~(1<<4);
	pCLKPWR->INFORM0 = 0x2BED;	
	

	//pIOPort->MISCCR|=(1<<2); //Previous state at STOP(?) mode (???)

	//D[31:0] pull-up off. The data bus will not be float by the external bus holder.
	//If the pull-up resitsers are turned on,
	//there will be the leakage current through the pull-up resister
	//pIOPort->MISCCR=pIOPort->MISCCR|(3<<0);

	// In the evaluation board, Even though in sleep mode, the devices are all supplied the power.
//	pIOPort->MSLCON = (0<<11)|(0<<10)|(0<<9)|(0<<8)|(0<<7)|(0<<6)|(0<<5)|(0<<4)|(0<<3)|(0<<2)|(0<<1)|(0<<0);
//	pIOPort->DSC0 = (1<<31)|(3<<8)|(3<<0);
//	pIOPort->DSC1 = (3<<28)|(3<<26)|(3<24)|(3<<22)|(3<<20)|(3<<18);

    /* LCD Controller Disable               */
	CLRPORT32(&pIOPort->GPGDAT, 1 << 4);

	

}

void ConfigStopGPIO(void)
{
	/*
    volatile S3C2443_IOPORT_REG *pIOPort = (S3C2443_IOPORT_REG*)OALPAtoVA(S3C2443_BASE_REG_PA_IOPORT, FALSE);
	
///////////////////////////////////////////////////////////////////////////////
////////////	
	// VDD_OP1 IO
	// GPF[7:0], GPG[7:0], GPE[15:14], GPE[4:0]

	
	//GPF
	pIOPort->GPFCON &=~(0xffff<<0);
	pIOPort->GPFCON |= ((0x1<<14)|(0x1<<12)|(0x1<<10)|(0x1<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x2<<0));
	           
	pIOPort->GPFUDP &=~(0xffff<<0);
	pIOPort->GPFUDP |= ((0x2<<14)|(0x2<<12)|(0x2<<10)|(0x2<<8)|(0x1<<6)|(0x1<<4)|(0x2<<2)|(0x1<<0));
	
	pIOPort->GPFDAT &=~ (0xff<<0);
	pIOPort->GPFDAT |= ((0x0<<7)|(0x0<<6)|(0x0<<5)|(0x0<<4)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	
	//GPG
	pIOPort->GPGCON &=~(0xffff<<0);
	pIOPort->GPGCON |= ((0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x2<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	           
	pIOPort->GPGUDP &=~(0xffff<<0);
	pIOPort->GPGUDP |= ((0x2<<14)|(0x2<<12)|(0x1<<10)|(0x1<<8)|(0x1<<6)|(0x1<<4)|(0x1<<2)|(0x1<<0));
	
	pIOPort->GPGDAT &=~ (0xff<<0);
	pIOPort->GPGDAT |= ((0x1<<7)|(0x0<<6)|(0x1<<5)|(0x1<<4)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	
	//GPA
	pIOPort->GPACON &=~(0x1<<21);
	pIOPort->GPACON |= ((0x0<<21));
	
	pIOPort->GPADAT &=~ (0x7<<21);
	pIOPort->GPADAT |= ((0x1<<21));

	
	// DP0 / DN0
	pIOPort->MISCCR |= (1<<12);
	

	
///////////////////////////////////////////////////////////////////////////////
////////////	
	// VDD_OP2 IO
	// GPB[10:0], GPH[12:0], GPE[15:14], GPE[4:0]

	
	//GPB
	
	pIOPort->GPBCON &= ~(0x3fffff<<0);
	pIOPort->GPBCON |= ((0x0<<20)|(0x0<<18)|(0x0<<16)|(0x0<<14)|(0x0<<12)|(0x0<<10)|\
                        (0x0<<8)|(0x1<<6)|(0x1<<4)|(0x0<<2)|(0x1<<0));

	
	pIOPort->GPBUDP = (pIOPort->GPBUDP &=~(0x3fffff<<0));
	pIOPort->GPBUDP |= ((0x1<<20)|(0x1<<18)|(0x1<<16)|(0x1<<14)|(0x1<<12)|(0x1<<10)|\
                        (0x1<<8)|(0x2<<6)|(0x2<<4)|(0x1<<2)|(0x2<<0));          
	
	pIOPort->GPBDAT &=~ (0x7ff<<0);
	pIOPort->GPBDAT |= ((0x1<<10)|(0x1<<9)|(0x1<<8)|(0x1<<7)|(0x1<<6)|(0x1<<5)|(0x1<<4)|\
                        (0x1<<3)|(0x0<<2)|(0x0<<1)|(0x0<<0));

	//GPE
	pIOPort->GPECON &=~((0xf<<28)|(0x3ff<<0));
	pIOPort->GPECON |= ((0x0<<30)|(0x0<<28)|(0x1<<8)|(0x0<<6)|(0x1<<4)|(0x0<<2)|(0x0<<0));
	
	pIOPort->GPEUDP &=~((0xf<<28)|(0x3ff<<0));
	pIOPort->GPEUDP |= ((0x2<<30)|(0x2<<28)|(0x2<<8)|(0x1<<6)|(0x2<<4)|(0x1<<2)|(0x1<<0));
	
	pIOPort->GPEDAT &=~ (0xffff<<0);
	pIOPort->GPEDAT |= ((0x1<<15)|(0x1<<14)|(0x1<<4)|(0x1<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	pIOPort->GPEDAT = 0;
	
	
	//GPG
	pIOPort->GPGCON &=~(0xffff<<16);
	pIOPort->GPGCON |= ((0x0<<30)|(0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|\
                        (0x0<<18)|(0x0<<16));
	
	pIOPort->GPGUDP &=~(0xffff<<16);
	pIOPort->GPGUDP |= ((0x0<<30)|(0x1<<28)|(0x1<<26)|(0x1<<24)|(0x1<<22)|(0x2<<20)|\
                        (0x2<<18)|(0x1<<16));
	
	pIOPort->GPGDAT &=~ (0xff<<8);
	pIOPort->GPGDAT |= ((0x0<<15)|(0x0<<14)|(0x0<<13)|(0x0<<12)|(0x0<<11)|(0x0<<10)|\
                        (0x0<<9)|(0x0<<8));

	//GPH
	pIOPort->GPHCON &=~(0x3fffffff<<0);
	pIOPort->GPHCON |= ((0x1<<28)|(0x0<<26)|(0x0<<24)|(0x1<<22)|(0x0<<20)|(0x1<<18)|\
                        (0x0<<16)|(0x0<<6)|(0x1<<4)|(0x0<<2)|(0x1<<0));
	
	pIOPort->GPHUDP &=~(0x3fffffff<<0);
	pIOPort->GPHUDP |= ((0x2<<28)|(0x1<<26)|(0x1<<24)|(0x2<<22)|(0x1<<20)|(0x2<<18)|\
                        (0x1<<16)|(0x1<<6)|(0x2<<4)|(0x1<<2)|(0x2<<0));
	
	pIOPort->GPHDAT &=~ (0x7fff<<0);
	pIOPort->GPHDAT |= ((0x0<<14)|(0x1<<13)|(0x0<<12)|(0x1<<11)|(0x0<<10)|(0x1<<9)|\
                        (0x1<<8)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));

///////////////////////////////////////////////////////////////////////////////
////////////
	// VDD_SD IO
	// GPE[13:5], GPL[14:0], GPJ[15:13]
	
	//GPE
	pIOPort->GPECON &=~(0x3ffff<<10);
	pIOPort->GPECON |= ((0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)|\
	                    (0x0<<14)|(0x0<<12)|(0x0<<10));
	
	pIOPort->GPEUDP &=~(0x3ffff<<10);
	pIOPort->GPEUDP |= ((0x1<<26)|(0x1<<24)|(0x1<<22)|(0x2<<20)|(0x2<<18)|(0x2<<16)|\
	                    (0x2<<14)|(0x2<<12)|(0x1<<10));
	
	pIOPort->GPEDAT &=~ (0x1ff<<5);
	pIOPort->GPEDAT |= ((0x0<<13)|(0x0<<12)|(0x0<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|\
                        (0x0<<7)|(0x1<<6)|(0x1<<5));


	
	//GPL
	
	pIOPort->GPLCON &=~(0x3fffffff<<0);
	pIOPort->GPLCON |= ((0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|\
                        (0x0<<16)|(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|\
                        (0x0<<4)|(0x0<<2)|(0x1<<0));
	
	pIOPort->GPLUDP &=~(0x3fffffff<<0);
	pIOPort->GPLUDP |= ((0x1<<28)|(0x1<<26)|(0x1<<24)|(0x1<<22)|(0x1<<20)|(0x1<<18)|\