modelsim.ini

FFT算法的FPGA设计实现的VHDL代码

[Library]

std=$MODEL_TECH/std
ieee=$MODEL_TECH/ieee
verilog=$MODEL_TECH/verilog
arithmetic=$MODEL_TECH/arith
mgc_portable=$MODEL_TECH/mgc_port
std_developerskit=$MODEL_TECH/stdevkit
synopsys=$MODEL_TECH/synopsys
unisim=d:\modeltech\xilinx\unisim
xul=d:\modeltech\xilinx\xul

[vsim]
; Default run length
RunLength=100

; Iterations that can be run without advancing simulation time
IterationLimit=5000

; Simulator resolution
Resolution=ns

; Stop the simulator after an assertion message
; 0=Note  1 = Warning  2 = Error  3 = Failure  4 = Fatal
BreakOnAssertion=3

; List Translation
; Map an enumerated value to 0, 1, or Z.  Default is 'X';
List0='0' FALSE 'L'
List1='1' TRUE 'H'
ListZ='Z'

; Force Translation
; Map 1s and 0s to the enumerated value
Force0='0' FALSE
Force1='1' TRUE

; Default radix for all windows and commands...
; 0=symbolic, 2 = binary, 8 = octal, 10 = decimal, 16 = hex
DefaultRadix=0

; If set to 1, VSIM commands must use Verilog style hierarchical
; name (top.u1.w). If set to 0, use slashes as pathnmae
; delimiters (/u1/w).
VerilogNaming=0

; This controls the number of characters of a signal name
; shown in the waveform window. The default value or a
; value of zero tells VSIM to display the full name.
; WaveSignalNameWidth=10

; Save the command window contents to this file
; TranscriptFile=transcript

; Disable assertion messages
; ignoreNote=1
; ignoreWarning=1
; ignoreError=1
; ignoreFailure=1

; If zero, open files when elaborated
; else open files on first read or write
; DelayFileOpen=0

; List of dynamically loaded objects for Verilog PLI applications
; Veriuser=veriuser.dll

[ModelSim]
Status Bar Visible=1
Tool Bar Visible=1

; If this is zero, backslashes cannot be used as
; pathname delimiters (only forward slashes will work).
; You can, however, use backslashes as extended identifier
; delimiters on the command line (for VHDL 1993 support).
; BackslashesArePathnameDelimiters=0

; window colors and positions...
Position=102 46 948 618 1 -1 -1
[Source]
Background=255 255 255
Text=0 0 0
Breakpoint Dot=255 0 0
Current Line Pointer=0 0 255
Keyword=0 0 255
Identifier=0 0 0
Comment=0 128 0
Number=0 0 0
String=0 0 0
Position=22 22 610 351 1 0 451

[Transcript]
Background=255 255 255
Text=0 0 0
Position=0 2 588 331 1 -1 -1

[Wave]
Background=0 0 0
Grid=128 128 128
Time=192 192 192
Cursor=0 255 255
Delta=0 255 0
Text=255 0 255
Vector=255 255 0
LogicX=255 0 0
Logic0=255 255 255
Logic1=255 255 255
LogicZ=0 0 255
Position=22 38 824 403 1 154 154

[WaveNames]
Background=192 192 192
Text=0 0 0
Outline=0 0 0
Fill=255 255 0

[Structure]
Background=0 0 128
Text=255 255 255
Outline=255 255 0
Fill=128 128 128
Position=66 66 654 395 1 66 66

[Signals]
Background=0 128 0
Text=0 0 0
Outline=0 0 0
Fill=128 128 0
Position=132 132 720 461 1 132 132

[Variables]
Background=128 0 0
Text=255 255 255
Outline=255 255 0
Fill=128 128 128
Position=110 110 698 439 1 110 110

[Process]
Background=128 0 128
Text=255 255 255
Outline=255 255 0
Fill=128 128 128
Position=88 88 676 417 1 88 88

[List]
Background=128 128 128
Labels=255 255 0
Values=255 255 255
Selected Label=0 0 0
Selected Background=192 192 192
Position=44 44 632 373 1 44 44

[vcom]
Keep Dialog Open=1

[Dataflow]
Position=30 14 776 429 1 0 0