qam.fit.qmsg

实现qam调制解调实现qam调制解调实现qam调制解调

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Jun 15 09:18:25 2008 " "Info: Processing started: Sun Jun 15 09:18:25 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off QAM -c QAM " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off QAM -c QAM" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IMPP_MPP_AUTO_ASSIGNED_DEVICE" "QAM EP2C5T144C6 " "Info: Automatically selected device EP2C5T144C6 for design QAM" {  } {  } 0 0 "Automatically selected device %2!s! for design %1!s!" 0 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0}
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." {  } {  } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C8T144C6 " "Info: Device EP2C8T144C6 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0}
{ "Info" "IFIOMGR_PINS_MISSING_LOCATION_INFO" "11 11 " "Info: No exact pin location assignment(s) for 11 pins of 11 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "mout " "Info: Pin mout not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 400 128 304 416 "mout" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "mout" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { mout } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { mout } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "mout1 " "Info: Pin mout1 not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 48 392 568 64 "mout1" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "mout1" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { mout1 } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { mout1 } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Q\[7\] " "Info: Pin Q\[7\] not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 232 984 1160 248 "Q\[7..0\]" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "Q\[7\]" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[7] } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Q\[6\] " "Info: Pin Q\[6\] not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 232 984 1160 248 "Q\[7..0\]" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "Q\[6\]" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[6] } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Q\[5\] " "Info: Pin Q\[5\] not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 232 984 1160 248 "Q\[7..0\]" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "Q\[5\]" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[5] } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Q\[4\] " "Info: Pin Q\[4\] not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 232 984 1160 248 "Q\[7..0\]" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "Q\[4\]" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[4] } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Q\[3\] " "Info: Pin Q\[3\] not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 232 984 1160 248 "Q\[7..0\]" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "Q\[3\]" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[3] } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Q\[2\] " "Info: Pin Q\[2\] not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 232 984 1160 248 "Q\[7..0\]" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "Q\[2\]" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[2] } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Q\[1\] " "Info: Pin Q\[1\] not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 232 984 1160 248 "Q\[7..0\]" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "Q\[1\]" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[1] } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "Q\[0\] " "Info: Pin Q\[0\] not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 232 984 1160 248 "Q\[7..0\]" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "Q\[0\]" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[0] } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { Q[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "CNT_CLK " "Info: Pin CNT_CLK not assigned to an exact location on the device" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 16 -112 56 32 "CNT_CLK" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "CNT_CLK" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { CNT_CLK } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { CNT_CLK } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "CNT_CLK (placed in PIN 17 (CLK0, LVDSCLK0p, Input)) " "Info: Automatically promoted node CNT_CLK (placed in PIN 17 (CLK0, LVDSCLK0p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G2 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 16 -112 56 32 "CNT_CLK" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "CNT_CLK" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { CNT_CLK } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { CNT_CLK } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "74393:inst10\|28  " "Info: Automatically promoted node 74393:inst10\|28 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "mout1 " "Info: Destination node mout1" {  } { { "QAM.bdf" "" { Schematic "D:/杨淼的毕业设计/bs/QAM.bdf" { { 48 392 568 64 "mout1" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "mout1" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { mout1 } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { mout1 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "74393:inst10\|28~2 " "Info: Destination node 74393:inst10\|28~2" {  } { { "74393.bdf" "" { Schematic "d:/quartus60/libraries/others/maxplus2/74393.bdf" { { 528 440 504 608 "28" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "74393:inst10\|28~2" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { 74393:inst10|28~2 } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { 74393:inst10|28~2 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "74393.bdf" "" { Schematic "d:/quartus60/libraries/others/maxplus2/74393.bdf" { { 528 440 504 608 "28" "" } } } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "74393:inst10\|28" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { 74393:inst10|28 } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { 74393:inst10|28 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "DIV_CLK_2:inst15\|clk_out  " "Info: Automatically promoted node DIV_CLK_2:inst15\|clk_out " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "DIV_CLK_2:inst15\|clk_out~2 " "Info: Destination node DIV_CLK_2:inst15\|clk_out~2" {  } { { "DIV_CLK_2.tdf" "" { Text "D:/杨淼的毕业设计/bs/DIV_CLK_2.tdf" 7 3 0 } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "DIV_CLK_2:inst15\|clk_out~2" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { DIV_CLK_2:inst15|clk_out~2 } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { DIV_CLK_2:inst15|clk_out~2 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "DIV_CLK_2.tdf" "" { Text "D:/杨淼的毕业设计/bs/DIV_CLK_2.tdf" 7 3 0 } } { "d:/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/quartus60/win/Assignment Editor.qase" 1 { { 0 "DIV_CLK_2:inst15\|clk_out" } } } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { DIV_CLK_2:inst15|clk_out } "NODE_NAME" } } { "d:/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus60/win/TimingClosureFloorplan.fld" "" "" { DIV_CLK_2:inst15|clk_out } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 1 0}
{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Extra Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" {  } {  } 1 0 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0}