led1.ant

采用9054做为板卡与计算机通信的媒介

--------------------------------------------------------------------------------
-- Copyright (c) 1995-2003 Xilinx, Inc.
-- All Right Reserved.
--------------------------------------------------------------------------------
--   ____  ____ 
--  /   /\/   / 
-- /___/  \  /    Vendor: Xilinx 
-- \   \   \/     Version : 7.1.04i
--  \   \         Application : ISE Foundation
--  /   /         Filename : led1.ant
-- /___/   /\     Timestamp : Thu Mar 15 21:06:16 2007
-- \   \  /  \ 
--  \___\/\___\ 
--
--Command: 
--Design Name: led1
--Device: Xilinx
--

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_TEXTIO.ALL;
USE STD.TEXTIO.ALL;

ENTITY led1 IS
END led1;

ARCHITECTURE testbench_arch OF led1 IS
    FILE RESULTS: TEXT OPEN WRITE_MODE IS "D:\study\PCI\led1.ano";

    COMPONENT led
        PORT (
            main_clk : In std_logic;
            lclk : Out std_logic;
            led1 : Out std_logic;
            led2 : Out std_logic
        );
    END COMPONENT;

    SIGNAL main_clk : std_logic := '0';
    SIGNAL lclk : std_logic := '0';
    SIGNAL led1 : std_logic := '0';
    SIGNAL led2 : std_logic := '0';

    SHARED VARIABLE TX_ERROR : INTEGER := 0;
    SHARED VARIABLE TX_OUT : LINE;

    constant PERIOD : time := 200 ns;
    constant DUTY_CYCLE : real := 0.5;
    constant OFFSET : time := 0 ns;

    BEGIN
        UUT : led
        PORT MAP (
            main_clk => main_clk,
            lclk => lclk,
            led1 => led1,
            led2 => led2
        );

        PROCESS    -- clock process for main_clk
        BEGIN
            WAIT for OFFSET;
            CLOCK_LOOP : LOOP
                main_clk <= '0';
                WAIT FOR (PERIOD - (PERIOD * DUTY_CYCLE));
                main_clk <= '1';
                WAIT FOR (PERIOD * DUTY_CYCLE);
            END LOOP CLOCK_LOOP;
        END PROCESS;

        PROCESS    -- Annotation process for main_clk
            VARIABLE TX_TIME : INTEGER := 0;

            PROCEDURE ANNOTATE_lclk(
                TX_TIME : INTEGER
            ) IS
                VARIABLE TX_STR : String(1 to 4096);
                VARIABLE TX_LOC : LINE;
            BEGIN
                STD.TEXTIO.write(TX_LOC, string'("Annotate["));
                STD.TEXTIO.write(TX_LOC, TX_TIME);
                STD.TEXTIO.write(TX_LOC, string'(", lclk, "));
                IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, lclk);
                STD.TEXTIO.write(TX_LOC, string'("]"));
                TX_STR(TX_LOC.all'range) := TX_LOC.all;
                STD.TEXTIO.writeline(RESULTS, TX_LOC);
                STD.TEXTIO.Deallocate(TX_LOC);
            END;
            PROCEDURE ANNOTATE_led1(
                TX_TIME : INTEGER
            ) IS
                VARIABLE TX_STR : String(1 to 4096);
                VARIABLE TX_LOC : LINE;
            BEGIN
                STD.TEXTIO.write(TX_LOC, string'("Annotate["));
                STD.TEXTIO.write(TX_LOC, TX_TIME);
                STD.TEXTIO.write(TX_LOC, string'(", led1, "));
                IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, led1);
                STD.TEXTIO.write(TX_LOC, string'("]"));
                TX_STR(TX_LOC.all'range) := TX_LOC.all;
                STD.TEXTIO.writeline(RESULTS, TX_LOC);
                STD.TEXTIO.Deallocate(TX_LOC);
            END;
            PROCEDURE ANNOTATE_led2(
                TX_TIME : INTEGER
            ) IS
                VARIABLE TX_STR : String(1 to 4096);
                VARIABLE TX_LOC : LINE;
            BEGIN
                STD.TEXTIO.write(TX_LOC, string'("Annotate["));
                STD.TEXTIO.write(TX_LOC, TX_TIME);
                STD.TEXTIO.write(TX_LOC, string'(", led2, "));
                IEEE.STD_LOGIC_TEXTIO.write(TX_LOC, led2);
                STD.TEXTIO.write(TX_LOC, string'("]"));
                TX_STR(TX_LOC.all'range) := TX_LOC.all;
                STD.TEXTIO.writeline(RESULTS, TX_LOC);
                STD.TEXTIO.Deallocate(TX_LOC);
            END;
        BEGIN
            WAIT for 1 fs;
            ANNOTATE_lclk(0);
            ANNOTATE_led1(0);
            ANNOTATE_led2(0);
            WAIT for OFFSET;
            TX_TIME := TX_TIME + 0;
            ANNO_LOOP : LOOP
                --Rising Edge
                WAIT for 115 ns;
                TX_TIME := TX_TIME + 115;
                ANNOTATE_lclk(TX_TIME);
                ANNOTATE_led1(TX_TIME);
                ANNOTATE_led2(TX_TIME);
                WAIT for 85 ns;
                TX_TIME := TX_TIME + 85;
            END LOOP ANNO_LOOP;
        END PROCESS;

        PROCESS
            BEGIN
                WAIT FOR 1200 ns;

                STD.TEXTIO.write(TX_OUT, string'("Total[]"));
                STD.TEXTIO.writeline(RESULTS, TX_OUT);
                ASSERT (FALSE) REPORT
                    "Success! Simulation for annotation completed"
                    SEVERITY FAILURE;
            END PROCESS;

    END testbench_arch;