ccd.vhd.bak

本程序通过CPLD不同的波形来控制CCD的驱动

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity CCD is 
port(clk:in std_logic;
     start:in std_logic;
     RESET:out std_logic;
     Trigger:out std_logic;
     q1:buffer std_logic;
     q2:buffer std_logic;
     CLAMP:OUT std_logic;
     CLAMP1:OUT std_logic;
     CLAMP2:OUT std_logic;
     st:buffer std_logic);
end;
architecture one of CCD is
    signal cnt:std_logic_vector(1 downto 0);
    signal clk_tempr:std_logic;
    signal r:integer:=2;
    signal cnt2:std_logic_vector(2 downto 0);
    signal clk_temp:std_logic;
    signal clk_temp1:std_logic;
   --- signal clk_temp2:std_logic;
    constant n1:integer:=6;
    constant m1:integer:=2;
    signal cnt3:integer range n1 downto 0;
    constant s1:integer:=31;
    constant s2:integer:=2;
    signal cnt1:integer range s1 downto 0;
    constant n:integer:=5;
    signal clk_tempc:std_logic;
    signal clk_tempc1:std_logic;
begin 

process(clk,start,cnt1) -------------st
begin
if start='0' then
    if clk'event and clk='1' then
      if cnt1=s1-1 then
         cnt1<=0;
         else
         cnt1<=cnt1+1;
       end if;
     end if;
end if;
end process;
st<='1' when cnt1<s2 else '0';



process(clk) -------------RESET
begin
     if start='1' then
      clk_tempr<='1';
  elsif clk'event and clk='1' then
    if cnt=r then
       clk_tempr<=not clk_tempr;
       cnt<="00";
     else
       cnt<=cnt+1;
     end if;
end if;
end process;
RESET<=clk_tempr;


process(clk) --------------Trigger
begin
---if start='1' then
      ---clk_temp1<='0';
if clk'event and clk='1' then
   if cnt2=n then
      clk_temp1<='1';
      cnt2<="000";
   else
      cnt2<=cnt2+1;
      clk_temp1<='0';
   end if;
end if;
end process;
Trigger<=clk_temp1;





process(clk,cnt3) -----------q1   q2
begin
---if start='1' then
   --q1<='1';
 if clk'event and clk='1' then
   if cnt3=n1-1 then
      cnt3<=0;
    else
      cnt3<=cnt3+1;
    end if;
    --end if;
end if;
end process;
q1<='1' when cnt3<m1 else '0';
q2<='0' when cnt3<m1 else '1';



process(q1,clk_tempr) --------------CLAMP shang
begin
if start='1' then
    clk_tempc<='1';
   elsif st='1' and q2='1' then
    clk_tempc<='1';
   elsif q1='1' then
    clk_tempc<='0';
    elsif q1'event and q1='0' then
       if q1='0' and clk_tempr<='0' then
           clk_tempc<='1';
       end if;
    ---elsif clk_tempr'event and clk_tempr='1' then
       --if q1='1' or clk_tempr<='1' then
       --clk_temp<='0';
       --end if;
end if;
end process;
CLAMP<=clk_tempc;

process(clk_tempr,q1)  ----------------CLAMP xia
begin
if start='1' then
    clk_tempc1<='1';
   elsif st='1' and q2='1' then
    clk_tempc1<='1';
   elsif q2='0' then
    clk_tempc1<='1';

    elsif clk_tempr'event and clk_tempr='1' then
       if q1='1' or clk_tempr<='1' then
       clk_tempc1<='0';
       end if;
end if;
end process;
CLAMP1<=clk_tempc1;

clamp2<=clk_tempc and clk_tempc1;
    
end;