📄 ccd.fit.rpt
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+------------------------------------------+
; Non-Global High Fan-Out Signals ;
+--------------------------------+---------+
; Name ; Fan-Out ;
+--------------------------------+---------+
; start ; 12 ;
; lpm_counter:cnt1_rtl_0|dffs[4] ; 9 ;
; lpm_counter:cnt1_rtl_0|dffs[3] ; 9 ;
; lpm_counter:cnt1_rtl_0|dffs[2] ; 9 ;
; lpm_counter:cnt1_rtl_0|dffs[1] ; 9 ;
; cnt3[2] ; 8 ;
; cnt3[1] ; 8 ;
; lpm_counter:cnt1_rtl_0|dffs[0] ; 5 ;
; cnt2[0] ; 5 ;
; cnt2[1] ; 3 ;
; cnt2[2] ; 3 ;
; clk_tempr ; 3 ;
; cnt[1] ; 3 ;
; cnt[0] ; 3 ;
; LessThan0~29sexp ; 2 ;
; clk_tempc ; 2 ;
; process5~30sexp2 ; 1 ;
; process5~30sexp1 ; 1 ;
; CLAMP2~9 ; 1 ;
; clk_tempc~43 ; 1 ;
; LessThan1~38 ; 1 ;
; clk_tempc1~15 ; 1 ;
; clk_tempc1~14 ; 1 ;
; clk_tempc1 ; 1 ;
; LessThan0~27 ; 1 ;
; clk_temp1 ; 1 ;
; LessThan1~35 ; 1 ;
; LessThan1~33 ; 1 ;
+--------------------------------+---------+
+------------------------------------------------+
; Interconnect Usage Summary ;
+----------------------------+-------------------+
; Interconnect Resource Type ; Usage ;
+----------------------------+-------------------+
; Output enables ; 0 / 6 ( 0 % ) ;
; PIA buffers ; 17 / 144 ( 12 % ) ;
+----------------------------+-------------------+
+----------------------------------------------------------------------+
; LAB Macrocells ;
+----------------------------------------+-----------------------------+
; Number of Macrocells (Average = 5.00) ; Number of LABs (Total = 2) ;
+----------------------------------------+-----------------------------+
; 0 ; 2 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 0 ;
; 12 ; 0 ;
; 13 ; 0 ;
; 14 ; 0 ;
; 15 ; 0 ;
; 16 ; 1 ;
+----------------------------------------+-----------------------------+
+-------------------------------------------------------------------------------+
; Shareable Expander ;
+-------------------------------------------------+-----------------------------+
; Number of shareable expanders (Average = 1.75) ; Number of LABs (Total = 1) ;
+-------------------------------------------------+-----------------------------+
; 0 ; 3 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 1 ;
+-------------------------------------------------+-----------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; A ; LC11 ; clk, lpm_counter:cnt1_rtl_0|dffs[4], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[0], start ; lpm_counter:cnt1_rtl_0|dffs[0], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[4] ;
; A ; LC7 ; clk, cnt3[2], cnt2[0], cnt3[1] ; cnt3[1], cnt3[2], LessThan1~33, LessThan1~35, clk_tempc1~15, clk_tempc, LessThan1~38, process5~30sexp2 ;
; A ; LC9 ; clk, lpm_counter:cnt1_rtl_0|dffs[4], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[0], start ; lpm_counter:cnt1_rtl_0|dffs[0], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[4], LessThan0~27, LessThan0~29sexp, process5~30sexp1, process5~30sexp2 ;
; A ; LC10 ; clk, cnt2[2], cnt2[0], cnt2[1] ; cnt2[2], cnt2[1], clk_temp1 ;
; A ; LC12 ; clk, cnt3[2], cnt3[1], cnt2[0] ; cnt3[1], cnt3[2], LessThan1~33, LessThan1~35, clk_tempc1~14, clk_tempc, LessThan1~38, process5~30sexp1 ;
; A ; LC13 ; clk, cnt2[0], cnt2[1], cnt2[2] ; cnt2[2], cnt2[1], clk_temp1 ;
; A ; LC4 ; cnt3[2], cnt3[1] ; q1 ;
; A ; LC14 ; clk, lpm_counter:cnt1_rtl_0|dffs[4], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[0], start ; lpm_counter:cnt1_rtl_0|dffs[0], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[4], LessThan0~27, LessThan0~29sexp, process5~30sexp1, process5~30sexp2 ;
; A ; LC1 ; cnt3[2], cnt3[1] ; q2 ;
; A ; LC2 ; clk, cnt2[0], cnt2[1], cnt2[2] ; Trigger ;
; A ; LC15 ; clk, lpm_counter:cnt1_rtl_0|dffs[4], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[0], start ; lpm_counter:cnt1_rtl_0|dffs[0], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[4], LessThan0~27, LessThan0~29sexp, process5~30sexp1, process5~30sexp2 ;
; A ; LC16 ; clk, lpm_counter:cnt1_rtl_0|dffs[0], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[4], start ; lpm_counter:cnt1_rtl_0|dffs[0], lpm_counter:cnt1_rtl_0|dffs[1], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[4], LessThan0~27, LessThan0~29sexp, process5~30sexp1, process5~30sexp2 ;
; A ; LC3 ; lpm_counter:cnt1_rtl_0|dffs[4], lpm_counter:cnt1_rtl_0|dffs[3], lpm_counter:cnt1_rtl_0|dffs[2], lpm_counter:cnt1_rtl_0|dffs[1] ; st ;
; A ; LC6 ; clk_tempr, clk_tempc1~14, clk_tempc1~15 ; CLAMP2~9 ;
; A ; LC8 ; clk_tempr, clk_tempc, LessThan1~38, cnt3[2], cnt3[1], start, clk_tempc~43 ; clk_tempc, CLAMP2~9 ;
; A ; LC5 ; clk_tempc1, clk_tempc ; CLAMP2 ;
; B ; LC18 ; clk, cnt[1], cnt[0], start ; cnt[0], cnt[1], clk_tempr ;
; B ; LC25 ; clk ; cnt3[1], cnt2[2], cnt3[2], cnt2[1], clk_temp1 ;
; B ; LC26 ; clk, cnt[1], cnt[0], start ; cnt[0], cnt[1], clk_tempr ;
; B ; LC17 ; clk, start, cnt[1], cnt[0] ; RESET, clk_tempc1, clk_tempc ;
+-----+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------+
; Fitter Device Options ;
+----------------------------------------------+----------------+
; Option ; Setting ;
+----------------------------------------------+----------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off ;
; Enable device-wide reset (DEV_CLRn) ; Off ;
; Enable device-wide output enable (DEV_OE) ; Off ;
; Enable INIT_DONE output ; Off ;
; Configuration scheme ; Passive Serial ;
; Security bit ; Off ;
; Base pin-out file on sameframe device ; Off ;
+----------------------------------------------+----------------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 8.0 Build 215 05/29/2008 SJ Web Edition
Info: Processing started: Tue Apr 21 15:14:16 2009
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off CCD -c CCD
Info: Selected device EPM7064SLC84-6 for design "CCD"
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 153 megabytes
Info: Processing ended: Tue Apr 21 15:14:19 2009
Info: Elapsed time: 00:00:03
Info: Total CPU time (on all processors): 00:00:01
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