adc_test.tan.rpt
来自「这是sd/mmc卡程序的第三部分」· RPT 代码 · 共 189 行 · 第 1/5 页
RPT
189 行
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
+-------------------------------------------------------+--------------------+------+----+-------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; sclk ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
; altera_internal_jtag~TCKUTAP ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'sclk' ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_we_reg ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_datain_reg0 ; sclk ; sclk ; None ; None ; 6.980 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg0 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg1 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg2 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg3 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg4 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg5 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg6 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg7 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg8 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg9 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg10 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.53 MHz ( period = 7.116 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a14~portb_address_reg11 ; sclk ; sclk ; None ; None ; 7.000 ns ;
; N/A ; 140.69 MHz ( period = 7.108 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a11~portb_we_reg ; sclk ; sclk ; None ; None ; 6.983 ns ;
; N/A ; 140.69 MHz ( period = 7.108 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a11~portb_datain_reg0 ; sclk ; sclk ; None ; None ; 6.963 ns ;
; N/A ; 140.69 MHz ( period = 7.108 ns ) ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_pti2:auto_generated|altsyncram_44l1:altsyncram1|ram_block2a11~portb_address_reg0 ; sclk ; sclk ; None ; None ; 6.983 ns ;
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