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📄 pwm.lst

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   42: }
 00000068  E8BD400F  LDMIA       R13!,{R0-R3,LR}
 0000006C  E25EF004  SUBS        R15,R14,#0x0004
 00000070          ENDP ; 'PWMHandler?A'


*** CODE SEGMENT '?PR?PWM_Init?T?pwm':
   55: DWORD PWM_Init( DWORD cycle )
ARM COMPILER V2.50a,  pwm                                                                  08/03/06  18:03:57  PAGE 5   

 00000000  B510      PUSH        {R4,LR}
 00000002  1C03      MOV         R3,R0 ; cycle
 00000004  ---- Variable 'cycle' assigned to Register 'R3' ----
   57:     match_counter = 0;
 00000004  2100      MOV         R1,#0x0
 00000006  4800      LDR         R0,=match_counter ; match_counter
 00000008  6001      STR         R1,[R0,#0x0] ; match_counter
   58:     PINSEL0 = 0x000A800A;   /* set GPIOs for all PWMs */
 0000000A  4800      LDR         R2,=0xA800A
 0000000C  4800      LDR         R0,=0xE002C000
 0000000E  6002      STR         R2,[R0,#0x0]
   59:     PINSEL1 = 0x00000400;
 00000010  4800      LDR         R2,=0x400
 00000012  4800      LDR         R0,=0xE002C004
 00000014  6002      STR         R2,[R0,#0x0]
   61:     PWMTCR = TCR_RESET;     /* Counter Reset */ 
 00000016  2202      MOV         R2,#0x2
 00000018  4800      LDR         R0,=0xE0014004
 0000001A  6002      STR         R2,[R0,#0x0]
   63:     PWMPR = 0x00;       /* count frequency:Fpclk */
 0000001C  4800      LDR         R0,=0xE001400C
 0000001E  6001      STR         R1,[R0,#0x0]
   64:     PWMMCR = PWMMR0I | PWMMR0R; /* interrupt on PWMMR0, reset on PWMMR0, reset 
 00000020  2403      MOV         R4,#0x3
 00000022  4800      LDR         R0,=0xE0014014
 00000024  6004      STR         R4,[R0,#0x0]
   66:     PWMMR0 = cycle;     /* set PWM cycle */
 00000026  1C19      MOV         R1,R3 ; cycle
 00000028  4800      LDR         R0,=0xE0014018
 0000002A  6001      STR         R1,[R0,#0x0]
   67:     PWMMR1 = cycle * 5/6;
 0000002C  1C18      MOV         R0,R3 ; cycle
 0000002E  2105      MOV         R1,#0x5
 00000030  4348      MUL         R0,R1
 00000032  2206      MOV         R2,#0x6
 00000034  1C11      MOV         R1,R2
 00000036  F7FF      BL          ?C?UDIV?T  ; T=0x0001  (1) ; ?C?UDIV?T
 00000038  FFE3      BL          ?C?UDIV?T  ; T=0x0001  (2) ; ?C?UDIV?T
 0000003A  1C08      MOV         R0,R1
 0000003C  4800      LDR         R1,=0xE001401C
 0000003E  6008      STR         R0,[R1,#0x0]
   68:     PWMMR2 = cycle * 2/3;
 00000040  1C18      MOV         R0,R3 ; cycle
 00000042  0040      LSL         R0,R0,#0x1 ; cycle
 00000044  1C21      MOV         R1,R4
 00000046  F7FF      BL          ?C?UDIV?T  ; T=0x0001  (1) ; ?C?UDIV?T
 00000048  FFDB      BL          ?C?UDIV?T  ; T=0x0001  (2) ; ?C?UDIV?T
 0000004A  1C08      MOV         R0,R1
 0000004C  4800      LDR         R1,=0xE0014020
 0000004E  6008      STR         R0,[R1,#0x0]
   69:     PWMMR3 = cycle * 1/2;
 00000050  1C19      MOV         R1,R3 ; cycle
 00000052  0849      LSR         R1,R1,#0x1 ; cycle
 00000054  4800      LDR         R0,=0xE0014024
 00000056  6001      STR         R1,[R0,#0x0]
   70:     PWMMR4 = cycle * 1/3;
 00000058  1C18      MOV         R0,R3 ; cycle
 0000005A  1C21      MOV         R1,R4
 0000005C  F7FF      BL          ?C?UDIV?T  ; T=0x0001  (1) ; ?C?UDIV?T
 0000005E  FFD0      BL          ?C?UDIV?T  ; T=0x0001  (2) ; ?C?UDIV?T
 00000060  1C08      MOV         R0,R1
 00000062  4800      LDR         R1,=0xE0014040
 00000064  6008      STR         R0,[R1,#0x0]
   71:     PWMMR5 = cycle * 1/6;   
 00000066  1C18      MOV         R0,R3 ; cycle
 00000068  1C11      MOV         R1,R2
ARM COMPILER V2.50a,  pwm                                                                  08/03/06  18:03:57  PAGE 6   

 0000006A  F7FF      BL          ?C?UDIV?T  ; T=0x0001  (1) ; ?C?UDIV?T
 0000006C  FFC9      BL          ?C?UDIV?T  ; T=0x0001  (2) ; ?C?UDIV?T
 0000006E  1C08      MOV         R0,R1
 00000070  4800      LDR         R1,=0xE0014044
 00000072  6008      STR         R0,[R1,#0x0]
   74:     PWMLER = LER0_EN | LER1_EN | LER2_EN | LER3_EN | LER4_EN | LER5_EN | LER6_EN;
 00000074  217F      MOV         R1,#0x7F
 00000076  4800      LDR         R0,=0xE0014050
 00000078  6001      STR         R1,[R0,#0x0]
   76:     if ( install_irq( PWM0_INT, (void *)PWMHandler ) == FALSE )
 0000007A  4900      LDR         R1,=PWMHandler?A ; PWMHandler?A
 0000007C  2008      MOV         R0,#0x8
 0000007E  F7FF      BL          install_irq?T  ; T=0x0001  (1)
 00000080  FFBF      BL          install_irq?T  ; T=0x0001  (2)
 00000082  2800      CMP         R0,#0x0 ; install_irq?T
 00000084  D101      BNE         L_2  ; T=0x0000008A
   78:     return (FALSE);
 00000086  2000      MOV         R0,#0x0
 00000088  E000      B           L_3  ; T=0x0000008C
   79:     }
 0000008A          L_2:
   80:     return (TRUE);
 0000008A  2001      MOV         R0,#0x1
   81: }
 0000008C          L_3:
 0000008C  BC10      POP         {R4}
 0000008E  BC08      POP         {R3}
 00000090  4718      BX          R3
 00000092          ENDP ; 'PWM_Init?T'


*** CODE SEGMENT '?PR?PWM_Set?T?pwm':
   92: void PWM_Set( DWORD cycle, DWORD offset )
 00000000  B530      PUSH        {R4-R5,LR}
 00000002  1C0A      MOV         R2,R1 ; offset
 00000004  ---- Variable 'offset' assigned to Register 'R2' ----
 00000004  1C04      MOV         R4,R0 ; cycle
 00000006  ---- Variable 'cycle' assigned to Register 'R4' ----
   94:     PWMMR0 = cycle;     /* set PWM cycle */
 00000006  1C21      MOV         R1,R4 ; cycle
 00000008  4800      LDR         R0,=0xE0014018
 0000000A  6001      STR         R1,[R0,#0x0]
   95:     PWMMR1 = cycle * 5/6 + offset;
 0000000C  1C20      MOV         R0,R4 ; cycle
 0000000E  2105      MOV         R1,#0x5
 00000010  4348      MUL         R0,R1
 00000012  2306      MOV         R3,#0x6
 00000014  1C19      MOV         R1,R3
 00000016  F7FF      BL          ?C?UDIV?T  ; T=0x0001  (1) ; ?C?UDIV?T
 00000018  FFF3      BL          ?C?UDIV?T  ; T=0x0001  (2) ; ?C?UDIV?T
 0000001A  1C08      MOV         R0,R1
 0000001C  1C11      MOV         R1,R2 ; offset
 0000001E  1841      ADD         R1,R0,R1 ; offset
 00000020  4800      LDR         R0,=0xE001401C
 00000022  6001      STR         R1,[R0,#0x0]
   96:     PWMMR2 = cycle * 2/3 + offset;
 00000024  1C20      MOV         R0,R4 ; cycle
 00000026  0040      LSL         R0,R0,#0x1 ; cycle
 00000028  2503      MOV         R5,#0x3
 0000002A  1C29      MOV         R1,R5
 0000002C  F7FF      BL          ?C?UDIV?T  ; T=0x0001  (1) ; ?C?UDIV?T
 0000002E  FFE8      BL          ?C?UDIV?T  ; T=0x0001  (2) ; ?C?UDIV?T
 00000030  1C08      MOV         R0,R1
 00000032  1C11      MOV         R1,R2 ; offset
 00000034  1841      ADD         R1,R0,R1 ; offset
 00000036  4800      LDR         R0,=0xE0014020
 00000038  6001      STR         R1,[R0,#0x0]
   97:     PWMMR3 = cycle * 1/2 + offset;
ARM COMPILER V2.50a,  pwm                                                                  08/03/06  18:03:57  PAGE 7   

 0000003A  1C21      MOV         R1,R4 ; cycle
 0000003C  0849      LSR         R1,R1,#0x1 ; cycle
 0000003E  1C10      MOV         R0,R2 ; offset
 00000040  1809      ADD         R1,R0 ; offset
 00000042  4800      LDR         R0,=0xE0014024
 00000044  6001      STR         R1,[R0,#0x0]
   98:     PWMMR4 = cycle * 1/3 + offset;
 00000046  1C20      MOV         R0,R4 ; cycle
 00000048  1C29      MOV         R1,R5
 0000004A  F7FF      BL          ?C?UDIV?T  ; T=0x0001  (1) ; ?C?UDIV?T
 0000004C  FFD9      BL          ?C?UDIV?T  ; T=0x0001  (2) ; ?C?UDIV?T
 0000004E  1C08      MOV         R0,R1
 00000050  1C11      MOV         R1,R2 ; offset
 00000052  1841      ADD         R1,R0,R1 ; offset
 00000054  4800      LDR         R0,=0xE0014040
 00000056  6001      STR         R1,[R0,#0x0]
   99:     PWMMR5 = cycle * 1/6 + offset;
 00000058  1C20      MOV         R0,R4 ; cycle
 0000005A  1C19      MOV         R1,R3
 0000005C  F7FF      BL          ?C?UDIV?T  ; T=0x0001  (1) ; ?C?UDIV?T
 0000005E  FFD0      BL          ?C?UDIV?T  ; T=0x0001  (2) ; ?C?UDIV?T
 00000060  1C08      MOV         R0,R1
 00000062  1C11      MOV         R1,R2 ; offset
 00000064  1841      ADD         R1,R0,R1 ; offset
 00000066  4800      LDR         R0,=0xE0014044
 00000068  6001      STR         R1,[R0,#0x0]
  104:     PWMLER = LER0_EN | LER1_EN | LER2_EN | LER3_EN | LER4_EN | LER5_EN | LER6_EN;    
 0000006A  217F      MOV         R1,#0x7F
 0000006C  4800      LDR         R0,=0xE0014050
 0000006E  6001      STR         R1,[R0,#0x0]
  106: }
 00000070  BC30      POP         {R4-R5}
 00000072  BC08      POP         {R3}
 00000074  4718      BX          R3
 00000076          ENDP ; 'PWM_Set?T'


*** CODE SEGMENT '?PR?PWM_Start?T?pwm':
  120:     PWMPCR = PWMENA1 | PWMENA2 | PWMENA3 | PWMENA4 | PWMENA5 | PWMENA6;
 00000000  4800      LDR         R1,=0x7E00
 00000002  4800      LDR         R0,=0xE001404C
 00000004  6001      STR         R1,[R0,#0x0]
  121:     PWMTCR = TCR_CNT_EN | TCR_PWM_EN;   /* counter enable, PWM enable */
 00000006  2109      MOV         R1,#0x9
 00000008  4800      LDR         R0,=0xE0014004
 0000000A  6001      STR         R1,[R0,#0x0]
  123: }
 0000000C  4770      BX          R14
 0000000E          ENDP ; 'PWM_Start?T'


*** CODE SEGMENT '?PR?PWM_Stop?T?pwm':
  136:     PWMPCR = 0;
 00000000  2100      MOV         R1,#0x0
 00000002  4800      LDR         R0,=0xE001404C
 00000004  6001      STR         R1,[R0,#0x0]
  137:     PWMTCR = 0x00;      /* Stop all PWMs */
 00000006  4800      LDR         R0,=0xE0014004
 00000008  6001      STR         R1,[R0,#0x0]
  139: }
 0000000A  4770      BX          R14
 0000000C          ENDP ; 'PWM_Stop?T'



Module Information          Static
----------------------------------
  code size            =    ------
  data size            =         4
  const size           =    ------
End of Module Information.


ARM COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)

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