📄 test_il.m
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Property of Freescale
% Freescale Confidential Proprietary
% Freescale Copyright (C) 2005 All rights reserved
% ----------------------------------------------------------------------------
% $RCSfile: test_IL.m.rca $
% $Revision: 1.8 $
% $Date: Mon Oct 23 15:23:49 2006 $
% Target: Matlab
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function status = test_ConvEncoder
addpath('../../../../CM/Utilities/matlab');
status = -1;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ModuleName = 'Interleaver';
disp(['Testing ' ModuleName ' ... ']);
%-- Test vectors, 1st col input, 2nd col reference, 3rd col - punct type,
%<FN>_<ZN>_<BN>_<CBN>
TV = { ...
'TC000/IF1fTX_00_00_00_00.lod' 'TC000/IF1gTX_00_00_00_00.lod' '2' ;
'TC001/IF1fTX_00_00_00_00.lod' 'TC001/IF1gTX_00_00_00_00.lod' '2' ;
'TC001/IF1fTX_00_00_01_00.lod' 'TC001/IF1gTX_00_00_01_00.lod' '2' ;
'TC001/IF1fTX_00_00_02_00.lod' 'TC001/IF1gTX_00_00_02_00.lod' '2' ;
'TC001/IF1fTX_00_00_03_00.lod' 'TC001/IF1gTX_00_00_03_00.lod' '2' ;
'TC001/IF1fTX_00_00_03_01.lod' 'TC001/IF1gTX_00_00_03_01.lod' '2' ;
'TC001/IF1fTX_00_00_03_02.lod' 'TC001/IF1gTX_00_00_03_02.lod' '2' ;
'TC001/IF1fTX_00_00_03_03.lod' 'TC001/IF1gTX_00_00_03_03.lod' '2' ;
'TC001/IF1fTX_00_00_03_04.lod' 'TC001/IF1gTX_00_00_03_04.lod' '2' ;
'TC002/IF1fTX_00_00_00_00.lod' 'TC002/IF1gTX_00_00_00_00.lod' '2' ;
'TC002/IF1fTX_00_00_01_00.lod' 'TC002/IF1gTX_00_00_01_00.lod' '2' ;
'TC002/IF1fTX_00_00_02_00.lod' 'TC002/IF1gTX_00_00_02_00.lod' '2' ;
'TC002/IF1fTX_00_00_03_00.lod' 'TC002/IF1gTX_00_00_03_00.lod' '2' ;
'TC002/IF1fTX_00_00_03_01.lod' 'TC002/IF1gTX_00_00_03_01.lod' '2' ;
'TC002/IF1fTX_00_00_03_02.lod' 'TC002/IF1gTX_00_00_03_02.lod' '2' ;
'TC002/IF1fTX_00_00_03_03.lod' 'TC002/IF1gTX_00_00_03_03.lod' '2' ;
'TC002/IF1fTX_00_00_03_04.lod' 'TC002/IF1gTX_00_00_03_04.lod' '2' ;
'TC002/IF1fTX_00_00_03_05.lod' 'TC002/IF1gTX_00_00_03_05.lod' '2' ;
'TC003/IF1fTX_00_00_00_00.lod' 'TC003/IF1gTX_00_00_00_00.lod' '2' ;
'TC003/IF1fTX_00_00_01_00.lod' 'TC003/IF1gTX_00_00_01_00.lod' '2' ;
'TC003/IF1fTX_00_00_02_00.lod' 'TC003/IF1gTX_00_00_02_00.lod' '2' ;
'TC003/IF1fTX_00_00_03_00.lod' 'TC003/IF1gTX_00_00_03_00.lod' '4' ;
'TC003/IF1fTX_00_00_03_01.lod' 'TC003/IF1gTX_00_00_03_01.lod' '4' ;
'TC003/IF1fTX_00_00_03_02.lod' 'TC003/IF1gTX_00_00_03_02.lod' '4' ;
'TC004/IF1fTX_00_00_00_00.lod' 'TC004/IF1gTX_00_00_00_00.lod' '2' ;
'TC004/IF1fTX_00_00_01_00.lod' 'TC004/IF1gTX_00_00_01_00.lod' '2' ;
'TC004/IF1fTX_00_00_02_00.lod' 'TC004/IF1gTX_00_00_02_00.lod' '2' ;
'TC004/IF1fTX_00_00_03_00.lod' 'TC004/IF1gTX_00_00_03_00.lod' '4' ;
'TC004/IF1fTX_00_00_03_01.lod' 'TC004/IF1gTX_00_00_03_01.lod' '4' ;
'TC004/IF1fTX_00_00_03_02.lod' 'TC004/IF1gTX_00_00_03_02.lod' '4' ;
'TC004/IF1fTX_00_00_03_03.lod' 'TC004/IF1gTX_00_00_03_03.lod' '4' ;
'TC004/IF1fTX_00_00_03_04.lod' 'TC004/IF1gTX_00_00_03_04.lod' '4' ;
'TC005/IF1fTX_00_00_00_00.lod' 'TC005/IF1gTX_00_00_00_00.lod' '2' ;
'TC005/IF1fTX_00_00_01_00.lod' 'TC005/IF1gTX_00_00_01_00.lod' '2' ;
'TC005/IF1fTX_00_00_02_00.lod' 'TC005/IF1gTX_00_00_02_00.lod' '2' ;
'TC005/IF1fTX_00_00_03_00.lod' 'TC005/IF1gTX_00_00_03_00.lod' '6' ;
'TC005/IF1fTX_00_00_03_01.lod' 'TC005/IF1gTX_00_00_03_01.lod' '6' ;
'TC005/IF1fTX_00_00_03_02.lod' 'TC005/IF1gTX_00_00_03_02.lod' '6' ;
'TC005/IF1fTX_00_00_03_03.lod' 'TC005/IF1gTX_00_00_03_03.lod' '6' ;
'TC005/IF1fTX_00_00_03_04.lod' 'TC005/IF1gTX_00_00_03_04.lod' '6' ;
'TC005/IF1fTX_00_00_03_05.lod' 'TC005/IF1gTX_00_00_03_05.lod' '6' ;
'TC006/IF1fTX_00_00_00_00.lod' 'TC006/IF1gTX_00_00_00_00.lod' '2' ;
'TC006/IF1fTX_00_00_01_00.lod' 'TC006/IF1gTX_00_00_01_00.lod' '2' ;
'TC006/IF1fTX_00_00_02_00.lod' 'TC006/IF1gTX_00_00_02_00.lod' '2' ;
'TC006/IF1fTX_00_00_03_00.lod' 'TC006/IF1gTX_00_00_03_00.lod' '6' ;
'TC006/IF1fTX_00_00_03_01.lod' 'TC006/IF1gTX_00_00_03_01.lod' '6' ;
'TC006/IF1fTX_00_00_03_02.lod' 'TC006/IF1gTX_00_00_03_02.lod' '6' ;
'TC006/IF1fTX_00_00_03_03.lod' 'TC006/IF1gTX_00_00_03_03.lod' '6' ;
'TC006/IF1fTX_00_00_03_04.lod' 'TC006/IF1gTX_00_00_03_04.lod' '6' ;
'TC006/IF1fTX_00_00_03_05.lod' 'TC006/IF1gTX_00_00_03_05.lod' '6' ;
'TC007/IF1fTX_00_00_00_00.lod' 'TC007/IF1gTX_00_00_00_00.lod' '2' ;
'TC007/IF1fTX_00_00_01_00.lod' 'TC007/IF1gTX_00_00_01_00.lod' '2' ;
'TC007/IF1fTX_00_00_02_00.lod' 'TC007/IF1gTX_00_00_02_00.lod' '2' ;
'TC007/IF1fTX_00_00_03_00.lod' 'TC007/IF1gTX_00_00_03_00.lod' '6' ;
'TC007/IF1fTX_00_00_03_01.lod' 'TC007/IF1gTX_00_00_03_01.lod' '6' ;
'TC007/IF1fTX_00_00_03_02.lod' 'TC007/IF1gTX_00_00_03_02.lod' '6' ;
'TC007/IF1fTX_00_00_03_03.lod' 'TC007/IF1gTX_00_00_03_03.lod' '6' ;
'TC007/IF1fTX_00_00_03_04.lod' 'TC007/IF1gTX_00_00_03_04.lod' '6' ;
'TC007/IF1fTX_00_00_03_05.lod' 'TC007/IF1gTX_00_00_03_05.lod' '6' ;
'TC007/IF1fTX_00_00_03_06.lod' 'TC007/IF1gTX_00_00_03_06.lod' '6' ;
'TC007/IF1fTX_00_00_03_07.lod' 'TC007/IF1gTX_00_00_03_07.lod' '6' ;
'TC007/IF1fTX_00_00_03_08.lod' 'TC007/IF1gTX_00_00_03_08.lod' '6' ;
'TC007/IF1fTX_00_00_03_09.lod' 'TC007/IF1gTX_00_00_03_09.lod' '6' ;
'TC007/IF1fTX_00_00_03_10.lod' 'TC007/IF1gTX_00_00_03_10.lod' '6' ;
'TC007/IF1fTX_00_00_03_11.lod' 'TC007/IF1gTX_00_00_03_11.lod' '6' ;
'TC008/IF1fTX_00_00_00_00.lod' 'TC008/IF1gTX_00_00_00_00.lod' '2' ;
'TC008/IF1fTX_00_00_01_00.lod' 'TC008/IF1gTX_00_00_01_00.lod' '2' ;
'TC008/IF1fTX_00_00_02_00.lod' 'TC008/IF1gTX_00_00_02_00.lod' '2' ;
'TC008/IF1fTX_00_00_03_00.lod' 'TC008/IF1gTX_00_00_03_00.lod' '2' ;
'TC008/IF1fTX_00_00_03_01.lod' 'TC008/IF1gTX_00_00_03_01.lod' '2' ;
'TC009/IF1fTX_00_00_00_00.lod' 'TC009/IF1gTX_00_00_00_00.lod' '2' ;
'TC009/IF1fTX_00_00_01_00.lod' 'TC009/IF1gTX_00_00_01_00.lod' '2' ;
'TC009/IF1fTX_00_00_02_00.lod' 'TC009/IF1gTX_00_00_02_00.lod' '2' ;
'TC009/IF1fTX_00_00_03_00.lod' 'TC009/IF1gTX_00_00_03_00.lod' '2' ;
'TC009/IF1fTX_00_00_03_01.lod' 'TC009/IF1gTX_00_00_03_01.lod' '2' ;
'TC010/IF1fTX_00_00_00_00.lod' 'TC010/IF1gTX_00_00_00_00.lod' '2' ;
'TC010/IF1fTX_00_00_01_00.lod' 'TC010/IF1gTX_00_00_01_00.lod' '2' ;
'TC010/IF1fTX_00_00_02_00.lod' 'TC010/IF1gTX_00_00_02_00.lod' '2' ;
'TC010/IF1fTX_00_00_03_00.lod' 'TC010/IF1gTX_00_00_03_00.lod' '2' ;
'TC010/IF1fTX_00_00_03_01.lod' 'TC010/IF1gTX_00_00_03_01.lod' '2' ;
'TC13/IF1fTX_00_00_03_00.lod' 'TC13/IF1gTX_00_00_03_00.lod' '2';
'TC13/IF1fTX_00_00_03_01.lod' 'TC13/IF1gTX_00_00_03_01.lod' '2';
'TC13/IF1fTX_00_00_03_02.lod' 'TC13/IF1gTX_00_00_03_02.lod' '2';
};
%-- Loop over the TV
result = 1.*ones(1,size(TV,1));
for i=1:size(TV,1)
%-- Load stimuli
In = mGetBin(['../vector/in/' TV{i,1} ],'uint8','R');
Ref = mGetBin(['../vector/ref/' TV{i,2}],'uint8','R');
In_bits = mByteUnpack(In);
Ref_bits = mByteUnpack(Ref);
%-- Call Matlab function
mOut_bits = mIL(In_bits,length(In_bits),str2num(TV{i,3}));
%-- Compare
if (length(mOut_bits) == length(Ref_bits))
result(i) = any(mOut_bits-Ref_bits);
else
result(i) = 1;
length(mOut_bits)
length(Ref_bits)
end
if any(result(i))
disp(['Error: Matlab function failed for ' TV{i,1} ]);
else
disp(['OK: Matlab function succeeded for ' TV{i,1} ]);
end
end
if any(result)
disp(['Error: Matlab function ' ModuleName ' failed.' ]);
status = -1 ;
else
disp(['OK: Matlab function ' ModuleName ' succeeded.' ]);
status = 1;
end
%test case from the spec IEEE Std 802.16-2004 Cor1/D4
% 8.4.9.4.4 Example of OFDMA
disp('Testing Interleaver for OFDMA standard case...');
%input
In1_bits = mGetBin('../vector/in/In1_bits.lod','uint8','R');
%reference
Ref1_bits = mGetBin('../vector/ref/Ref1_bits.lod','uint8','R');
%call Matlab function
mOut_bits = mIL(In1_bits,length(In1_bits),2); %QPSK
if any(mOut_bits-Ref1_bits)
disp('Error: Matlab function failed.');
else
disp('OK: Matlab function succeeded.');
end
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