adc.h

一个LCD TV的源程序, 用的是realtek的IC

/*********************************************************************

      COPYRIGHT  (C)  Himax Technologies, Inc.

      File name     : ADC.H 

      Description   : Declare Built-In ADC Head File 

      Author        : Nice  

      Create date   : 2005.03.01 

      Modifications :

*********************************************************************/

#ifndef _ADC_H
#define _ADC_H

/********************** Include Section *****************************/

#include "i2c_control.h"

/********************** Macro Function Define ***********************/

#define Init_Adc_VGA();      I2CWriteByte(PA8204_ADDR,0x4f,0x27);
#define Disable_ADC_VGA();   I2CWriteByte(PA8204_ADDR,0x4f,0x00);
#define Disable_ADC_YUV();   I2CWriteByte(PA8204_ADDR,0x4f,0x00);

/******************* External Function Process  *********************/

#undef EXTERN

#ifdef _ADC_C
    #define EXTERN		
#else
    #define EXTERN extern	
#endif

/******************* Define ADC Registers ************************/

#define _ADC_PLLDCMSB			0x41		/* ADC PLL Divider Control MSB */
#define _ADC_PLLDCLSB			0x42    	/* ADC PLL Divider Control LSB */
#define _ADC_RGAIN				0x48    	/* ADC Red Gain */
#define _ADC_GGAIN         		0x49    	/* ADC Green Gain */
#define _ADC_BGAIN				0x4a    	/* ADC Blue Gain */
#define _ADC_ROFF				0x4b  		/* ADC Red Offset */
#define _ADC_GOFF          		0x4c    	/* ADC Green Offset */
#define _ADC_BOFF          		0x4d    	/* ADC Blue Offset */
#define _ADC_CLPLACE       		0x45    	/* ADC Clamp Placement */
#define _ADC_CLDUR         		0x46    	/* ADC Clamp Duration */
#define _ADC_CTRL1				0x4e		/* ADC General Control 1 */
#define _ADC_PHASE				0x44		/* ADC Clock Phase */
#define _ADC_CKCTRL				0x4f		/* ADC Clock Clock Generator COntrol */
#define _ADC_CTRL2				0x50		/* ADC Genaral Control 2 */


#define MAX_OSD_RGB_GAIN		255			/* <= 255 */
#define MAX_OSD_RGB_OFFSET		63			/* <= 255 */
#define MAX_ADC_GAIN			255			/* <= 255 */
#define MIN_ADC_GAIN			0			/* >= 0   */
#define MAX_ADC_OFFSET			63			/* <= 63  */
#define MIN_ADC_OFFSET			0			/* >= 0   */

/************************ ADC PLL Table **************************/

#ifdef _ADC_C
	Byte const code ADC_YPbPr_Tbl[][6] =
	{
	   0x89,0x70,0xa0,0xa0,0x30,0x02,			   // 1080i_30
       0x35,0x90,0x10,0x90,0x10,0x28,              // 480i
       0x35,0x90,0x10,0xa0,0x30,0x02,              // 480p
	};
#endif

#ifdef _ADC_C
    Byte const code ADC_VGA_Tbl[][4]=
    {
       0x31,0xF0,0x30,0x50,                        // DMT0660, VGA 60Hz
    }; 
#else
    EXTERN Byte  code ADC_YPbPr_Tbl[][4];
    EXTERN Byte  code ADC_VGA_Tbl[][4];
#endif

/************************ Function Prototype ************************/

EXTERN void Init_ADC_YUV(void);
EXTERN void Set_ADC_YUV (Byte byMode);
EXTERN void Set_ADC_VGA (Byte byMode);
EXTERN void Set_ADC_VGA_GainOff (Byte *RGBdata);
EXTERN void ChgAdcPhase(void);

/************************ End of File  ******************************/
#endif