📄 ezlink_modem_main.c
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//---- Init the TxPacket with preamble and sync. pattern ------
TxPacket[0] = 0xAA; // byte0: 3rd preamble byte
TxPacket[1] = 0x2D; // byte1: sync byte#1
TxPacket[2] = 0xD4; // byte2: sync byte#2
TxPacket[3] = 0x00; // byte3: PL (Nr of bytes in the payload)
TxPacketPtr = 4;
//---- configuring the RF link --------------------------------
Configuration_cmd = 0x8007 | FREQ_Band; // Cload=12pF; TX registers, FIFO are disabled
Power_management_cmd = 0x8201; // Everything off, uC clk disabled
Receiver_control_cmd = 0x9481; // BW=135kHz, DRSSI=-97dBm, pin8=VDI, fast VDI
Txreg_write_cmd = 0xB800;
FIFO_cmd = 0xCA81; // Sync. latch cleared, limit=8bits, disable sensitive reset
Data_filter_cmd = 0xC22C; // Digital LPF (default)
AFC_cmd = 0xC4F7; // Auto AFC (default)
Frequency_cmd = 0xA7D0; // Fo=915.000MHz (default)
Transmitter_control_cmd = 0x9850; // df=75kHz, Pmax, normal modulation polarity
Data_rate_cmd = 0xC623; // 9579Baud (default)
//---- load settings from the eeprom:
Frequency_cmd = set_frq(read_EEPROM(EE_rf_ch)); // load the frequency from the eeprom
Transmitter_control_cmd = set_tx(RF_DEV, read_EEPROM(EE_rf_pwr)); // load the rf power from the eeprom
dr = read_EEPROM(EE_rf_dr + 1); // load the datarate from the eeprom
dr = dr << 8; // load the datarate from the eeprom
dr += read_EEPROM(EE_rf_dr); // load the datarate from the eeprom
Data_rate_cmd = set_dr(dr);
send_cmd(FIFO_cmd);
send_cmd(FIFO_cmd | 0x0002); // enable synchron latch
send_cmd(Configuration_cmd);
send_cmd(Frequency_cmd);
send_cmd(Power_management_cmd);
send_cmd(Receiver_control_cmd);
send_cmd(Transmitter_control_cmd);
// antenna tuning on startup
send_cmd(Power_management_cmd | 0x0020); // turn on the transmitter
delay_ms(5); // ant.tuning time (~100us) + Xosc starup time (5ms)
// end of antenna tuning
send_cmd(Power_management_cmd | 0x0080); // turn off transmitter, turn on receiver
send_cmd(Configuration_cmd | 0x0040); // enable the FIFO
send_cmd(FIFO_cmd);
send_cmd(FIFO_cmd | 0x0002); // enable synchron latch
send_cmd(0x0000); // read status byte (read ITs)
}
//==============================================================
// Packet transmission
//==============================================================
void Send_packet(int8 TxPacketLen)
{
output_high(TLED); // Turn on TX LED
if(TxPacketLen > PACKET_LEN) TxPacketLen = PACKET_LEN;
TxPacket[3] = TxPacketLen - 4; // set the length of the payload
//---- Turn off receiver, enable the TX register -------------
send_cmd(Power_management_cmd); // turn off the transmitter and the receiver
send_cmd(Configuration_cmd | 0x0080); // Enable the TX register
//---- Packet transmission -----------------------------------
// The reset value of the TX regs are [AA AA]. Transmission can be started.
// Enable transmitter:
send_cmd(Power_management_cmd | 0x0020); // turn on the transmitter
// Loading the rest of the bytes:
TxPacketPtr = 0;
TxPacketLen += 2; // +2 dummy bytes (tx latch)
while(TxPacketPtr < TxPacketLen)
{
output_low(NSEL); // RGIT bit appears on SDI
if (input(SPI_SDI))
{
send_cmd(Txreg_write_cmd | TxPacket[TxPacketPtr]); // Fill the txreg with the next byte
++TxPacketPtr;
}
}
output_high(NSEL);
//---- Turn off the transmitter, disable the Tx register -----
send_cmd(Power_management_cmd | 0x0080); // turn off transmitter, turn on the receiver
send_cmd(Configuration_cmd | 0x0040); // diable the TX register, Enable the FIFO
TxPacket[3] = 0; // payload length = 0
TxPacketPtr = 4; // clear tx buffer
output_low(TLED); // Turn off the TX LED
}
//==============================================================
// Packet receiving
//==============================================================
#define NODATA 0
#define DATA_RECEIVED 1
#define PACKET_RECEIVED 2
int8 Receive_packet(void)
{
unsigned int8 ch;
output_low(NSEL); // FFIT appears on SPI_SDI
if(input(SPI_SDI)) // Read out the FIFO in case of FFIT
{
//---- There is data in the RX FIFO
output_high(NSEL);
output_low(NFFS); // FIFO selected
if(RxPacketLen) //this is the first byte of the packet???
{
RxPacket[RxPacketPtr++] = spi_read_sw(); // read a byte
if(RxPacketPtr >= RxPacketLen) // EOP test
{
send_cmd(FIFO_cmd); // whole packet received, reset FIFO
output_high(NFFS);
output_low(RLED);
//krk (2007/03/24): extra delay added by krk
delay_ms(250);
//mod. end
return(PACKET_RECEIVED);
}
}
else //first byte should be the packetlen
{
ch = spi_read_sw();
if ((ch > 0) && (ch < PAYLOAD_LEN)) // is it in the correct range?
{
RxPacketLen = ch;
output_high(RLED); // RLED incicates packet receiving
}
else
{
output_high(NFFS); // bad packet lenght received,
send_cmd(Power_management_cmd); // turn off the transmitter and the receiver
send_cmd(FIFO_cmd); // reset FIFO
send_cmd(Configuration_cmd); //disable FIFO, TX_latch
send_cmd(Configuration_cmd | 0x0040); // enable the FIFO
send_cmd(Power_management_cmd | 0x0080); // turn on the receiver
send_cmd(FIFO_cmd | 0x0002); // FIFO synchron latch re-enable
return(NODATA);
}
}
output_high(NFFS);
return(DATA_RECEIVED); // next databyte received
}
else // Read out the rest IT bits in case of no FFIT
{
//---- No data in the RX FIFO
ffit_rgit = input(SPI_SDI);
output_high(SPI_SCK);
output_low(SPI_SCK);
por = input(SPI_SDI);
output_high(SPI_SCK);
output_low(SPI_SCK);
ffof_rgur = input(SPI_SDI);
output_high(SPI_SCK);
output_low(SPI_SCK);
wkup = input(SPI_SDI);
output_high(SPI_SCK);
output_low(SPI_SCK);
ext = input(SPI_SDI);
output_high(SPI_SCK);
output_low(SPI_SCK);
lbd = input(SPI_SDI);
output_high(SPI_SCK);
output_low(SPI_SCK); // 6th clock pulse to reset the IT latches
output_high(NSEL);
return(NODATA);
}
}
//*************************************************************************************************
// M A I N P R O G R A M
//*************************************************************************************************
void main(void) // Program start point
{
int8 i;
static int8 oldmode;
char str[10];
MAIN_init(); // Main init rutin
CMD_init();
printabout(); // Welcome message to the serial port
while(1) // foreground loop, always running
{
// Synchronized routines:
//==========================================================
//---- 10ms soft interrupt area:
while(swit_10ms)
{
--swit_10ms;
if(rs232_timer && rs232_timer <= rs232_timeout) // increase the rx timer, if it is running
++rs232_timer;
opmode = !input(NCMD);
if(!oldmode && opmode) Printf("Command mode\r\n>");
oldmode = opmode;
}
// NOT synchronized routines:
//==========================================================
if(BufChar) // if there is any char in the rs232 buffer:
{
if(opmode) // Processing in Command mode
{
CmdExec(ReadBuffer());
}
else // Processing in Data mode
{
if(TxPacketPtr < PACKET_LEN)
TxPacket[TxPacketPtr++] = ReadBuffer(); // - save the received byte
}
}
//---- rs232 EOP condition:
if(TxPacketPtr >= PACKET_LEN ||
TxPacket[TxPacketPtr - 1] == rs232_EOP ||
rs232_timer >= rs232_timeout)
{
Send_packet(TxPacketPtr); // Send packet
rs232_timer = 0; // reset rs232 rx timer
}
//---- Linktest button pressed:
if(input(LT) == 0) // Sending Linktest message if button pressed
{
while(input(LT) == 0) {}; // wait for releasing Button1
TxPacket[3] = 9; // Length of the payload
strcpy(&TxPacket[4],"Link ??\r\n");
Send_packet(13);
}
//---- Packet receiving:
while(input(NIRQ) == 0) // polling the nIRQ pin of the chip
{
if(Receive_packet() == PACKET_RECEIVED) // if the whole packet has been received
{
for(i=0;i<RxPacketLen;i++) // send the packet via RS232
putc(RxPacket[i]);
if(RxPacketLen == 9) // Check if it was a linktest packet
{
strcpy(str,"Link ??\r\n");
RxPacket[9] = 0;
if(!strcmp(str, RxPacket))
{
TxPacket[3] = 9; // Length of the payload
strcpy(&TxPacket[4],"Link OK\r\n"); // send ACK message
Send_packet(13);
}
}
RxPacketPtr = 0;
RxPacketLen = 0;
send_cmd(FIFO_cmd | 0x0002); // FIFO synchron latch re-enable
}
}
}
}
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