sleep.c

支持三星原产的S3C24A0开发板

	//Unmask interrupt
	rINTMSK=rINTMSK&~(BIT_EINT11_14);   //Just testing....
    	rINTMSK=rINTMSK&~(BIT_EINT7_10);
	rINTMSK=rINTMSK&~(BIT_EINT0_2);
	rINTMSK=rINTMSK&~(BIT_RTC);	    //Just testing....

	//Unmask sub interrupt 
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT0);
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT1);
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT9);
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT11);
//	rEINTMASK=0x7ffff;

#endif   
    
#if USE_RTC_ALARM
	SetAlarmWakeUp(5);
#endif
	rADCCON|=(1<<2);// To reduce ADC power consumption

	Uart_Printf("AC97Codec is going to LP mode, now.\n");
	AC97_Init();
	AC97_Codec_Init(22050);
	AC97_Codec_Cmd(0, 0x26, 0x1000); // AC97CODEC is going to LP mode.
	rAC_GLBCTRL&=~(1<<2);

	Uart_Printf("\nNow, SMDK24A0 is entering SLEEP mode.\n");
	Uart_TxEmpty(0);    //Wait until UART0 Tx buffer empty.

	//SRAMKey_Run = xxx;// Change if you want..

	//***Enter SLEEP mode
	rPWRMAN &= ~(0xffff);
	rPWRMAN |= ((1<<12)|(0xa3));  // WFI & SLEEP
	MMU_WaitForInterrupt();	// After WFI, the S3C24A0 enters sleep mode
    }
}


void Test_WarmReset(void)
{
    //Return from WarmReset
    if(rALIVECON & 1<<4)
    {
	Uart_Printf("[WarmReset Test]\n");

#if CHECK_SDRAM_SELFREFRESH
	Test_CheckSDRAM(_NONCACHE_STARTADDRESS,0x400000); //Check NONCACHEABLE AREA
#endif

	Clear_SleepKey();
	Uart_Printf("\n[Warm Reset] Test is Done!!!\n");
    }
    //WarmReset Ready
    else
    {
	Uart_Printf("[WarmReset Test]\n");

#if CHECK_SDRAM_SELFREFRESH
	Test_InitSDRAM(_NONCACHE_STARTADDRESS,0x400000); //Write test data into NONCACHEABLE AREA
#endif
	//SRAMKey_Run = xxx;// Change if you want..

	//Push Warm Reset Botton
	Uart_Printf("Now, Push Warm Reset Botton. \n");   
	while(1);
    }
}


void Test_SoftReset(void)
{
    //Return from SoftReset
    if(rALIVECON & 1<<6)
    {
	Uart_Printf("[SoftReset Test]\n");

#if CHECK_SDRAM_SELFREFRESH
	Test_CheckSDRAM(_NONCACHE_STARTADDRESS,0x400000); //Check NONCACHEABLE AREA
#endif

	Clear_SleepKey();
	Uart_Printf("\n[SoftReset] Test is Done!!!\n");
    }

    //SoftReset Ready
    else
    {
	Uart_Printf("[SoftReset Test]\n");
   
#if CHECK_SDRAM_SELFREFRESH
	Test_InitSDRAM(_NONCACHE_STARTADDRESS,0x400000); //Write test data into NONCACHEABLE AREA
#endif

	//SRAMKey_Run = xxx;// Change if you want..

	//SoftReset
	Uart_Printf("Now, Soft Reset causes reset on S3C24A0 except SDRAM. \n");   
	Uart_TxEmpty(0);    //Wait until UART0 Tx buffer empty.
	rSOFTRESET=0xa3;    //Software Reset
    }
}

void Test_WDTReset(void)
{
    //Return from WarmReset
    if(rALIVECON & 1<<5)
    {
	Uart_Printf("[Watch-dog Reset Test]\n");

#if CHECK_SDRAM_SELFREFRESH
	Test_CheckSDRAM(_NONCACHE_STARTADDRESS,0x400000); //Check NONCACHEABLE AREA
#endif

	Clear_SleepKey();
	Uart_Printf("\n[Watch-dog Reset] Test is Done!!!\n");
    }

    //WarmReset Ready
    else
    {
	Uart_Printf("[Watch-dog Reset Test]\n");
   
#if CHECK_SDRAM_SELFREFRESH
	Test_InitSDRAM(_NONCACHE_STARTADDRESS,0x400000); //Write test data into NONCACHEABLE AREA
#endif

	rWTCON = 0;	// clear wtcon
	rWTDAT = 8448 ;	// WDT clock = 128/1M --> 128us*8448 = 1s
	rWTCNT = 8448 ;
	
	//SRAMKey_Run = xxx;// Change if you want..

	// WDT reset enable
	Uart_Printf("After 1 sec the WDT reset will be assered. ..\n");
	Uart_TxEmpty(0);
	rWTCON = ((PCLK/1000000-1)<<8) |( 1<<5) | (3<<3) | (1);  
	while(1);
    }
}


void Test_BattFault(void)
{
    //Return from BATT_FLT
    if(rALIVECON & 1<<7)
    {
	Uart_Printf("[nBATT_FAULT signal Test]\n");

#if CHECK_SDRAM_SELFREFRESH
	Test_CheckSDRAM(_NONCACHE_STARTADDRESS,0x400000); //Check NONCACHEABLE AREA
#endif

#if 1 
	//Unmask interrupt
	rINTMSK=rINTMSK&~(BIT_EINT11_14);   //Just to test
	rINTMSK=rINTMSK&~(BIT_EINT7_10);    //Just to test
	rINTMSK=rINTMSK&~(BIT_EINT0_2);
		
	//Unmask sub interrupt 
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT0);
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT1);
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT9);
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT11);
	//for(i=0;i<100;i++);
#endif	

	Clear_SleepKey();
	Uart_Printf("[nBATT_FAULT signal Test is done]\n");
    }

    //BAT_FLT Ready
    else
    {
	Uart_Printf("[nBATT_FAULT signal Test]\n");
   
#if CHECK_SDRAM_SELFREFRESH
	Test_InitSDRAM(_NONCACHE_STARTADDRESS,0x400000); //Write test data into NONCACHEABLE AREA
#endif
	ConfigSleepGPIO();
	
        //Wake-up(EINT0)     	
        rGPCON_L=rGPCON_L&~(3<<0)|(2<<0);   //GP0=EINT0
        rEXTINTC0=rEXTINTC0&~(7<<0)|(2<<0); //EINT0=falling edge triggered
        
        //Wake-up(EINT1)     	
        rGPCON_L=rGPCON_L&~(3<<2)|(2<<2);   //GP1=EINT1
        rEXTINTC0=rEXTINTC0&~(7<<4)|(2<<4); //EINT1=falling edge triggered

        //To test not available wake-up EINT(EINT9) 
	rGPCON_L=rGPCON_L&~(3<<18)|(2<<18);	//GP9=EINT9
	rEXTINTC1=rEXTINTC1&~(7<<24)|(2<<24);	//EINT9=falling edge triggered
        
        //To test not available wake-up EINT(EINT11) 
        rGPCON_M=rGPCON_M&~(3<<0)|(2<<0);   //GP11=EINT11
        rEXTINTC2=rEXTINTC2&~(7<<0)|(2<<0); //EINT11=falling edge triggered
        
	//Interrupt service routine
	pISR_EINT0_2=(U32)EintInt;
	pISR_RTC=(U32)AlarmInt;
	pISR_EINT7_10=(U32)Eint9Int;
    	pISR_EINT11_14=(U32)Eint11Int;

	//Clear interrupt pending
	ClearPending(BIT_EINT11_14);
	ClearPending(BIT_EINT7_10);
	ClearPending(BIT_EINT0_2);

	//Clear sub interrupt pending
	rEINTPEND=BIT_EINTPEND_EINT11;	//Just to test
	rEINTPEND=BIT_EINTPEND_EINT9;	//Just to test
	rEINTPEND=BIT_EINTPEND_EINT1;
	rEINTPEND=BIT_EINTPEND_EINT0;

#if 1
	//Unmask interrupt
	rINTMSK=rINTMSK&~(BIT_EINT11_14);   //Just to test
	rINTMSK=rINTMSK&~(BIT_EINT7_10);    //Just to test
	rINTMSK=rINTMSK&~(BIT_EINT0_2);

	//Unmask sub interrupt 
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT0);
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT1);
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT9);  //Just to test
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT11); //Just to test
#endif   
    
	rPWRMAN=rPWRMAN&~(3<<9);//If there is battery falult, it will enter into sleep mode.

	//SRAMKey_Run = xxx;// Change if you want..

	Uart_Printf("Make the BATFLT low, then push any EINT key on SMDK24A0\n");
	Uart_Printf("And then release BATFLT(make high)\n");
	while(1);
    }
}


void Test_SleepMode_Hard(void)
{
    int i;
    int error=0;
    U32 portStatus[17];
    LcdEnvidOnOff(0); //Before entering SLEEP mode, LCD must be off	
    Delay(1);

    //Wake-up from SLEEP mode
    if(rALIVECON & 1<<3)//Wake-up from SLEEP mode
    {
	if(SRAMKey_Count<10) 
	{
	    //Uart_Printf("0x%x",SRAMKey_Count);
	    //Uart_TxEmpty(0);
	    SRAMKey_Count++;
	    ConfigSleepGPIO(); 

#if USE_RTC_ALARM
	    SetAlarmWakeUp(1);
#else
	    rGPCON_L=rGPCON_L&~(3<<18)|(2<<18);	    //GP9=EINT9
	    rEXTINTC1=rEXTINTC1&~(7<<24)|(2<<24);   //EINT9=falling edge triggered
	    rINTMSK=rINTMSK&~(BIT_EINT7_10);
	    rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT9);
#endif		
	    Uart_Printf("SRAMKey_Count=%d\n",SRAMKey_Count);
	    Uart_TxEmpty(0);
	    rPWRMAN=rPWRMAN&~(0xff)|(0xa3);  //SLEEP mode
	}
	else
	{
	    Clear_SleepKey();
	    //Restore the port configurations
	    for(i=0;i<17;i++)
		*((U32 *)(0x44800000 +i*4))=portStatus[i];

	    Port_Init();
	    Uart_Printf("SLEEP mode test is done\n");
	}
    }
    //Entering into SLEEP mode
    else
    {
	Uart_Printf("Entering into SLEEP mode and wakeup hard test\n");    		

	//Write SLEEP information into BACKUP AREA
	Set_SleepKey();
	SRAMKey_Count=0x0; // This is count for sleep hard loop test
	Uart_Printf("S3C24A0 will wake up by EINT9 connected with Function Generator.\n");
	Uart_Printf("Or RTC alarm(every 1 sec).\n");
	Uart_TxEmpty(0);

	ConfigSleepGPIO();

#if USE_RTC_ALARM
	SetAlarmWakeUp(1);
#else	
	//Wake-up(EINT9) 
	rGPCON_L=rGPCON_L&~(3<<18)|(2<<18);	//GP9=EINT9
	rEXTINTC1=rEXTINTC1&~(7<<24)|(2<<24);	//EINT9=falling edge triggered

	pISR_EINT7_10=(U32)Eint9Int_Hard;
	
	rEINTPEND=BIT_EINTPEND_EINT9;	
	ClearPending(BIT_EINT7_10);
    	
	rINTMSK=rINTMSK&~(BIT_EINT7_10);
	rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT9);
#endif	
	//SRAMKey_Run = xxx;// Change if you want..

	//***Enter SLEEP mode
	rPWRMAN &= ~(0xffff);
	rPWRMAN |= ((1<<12)|(0xa3));  // WFI & SLEEP
	MMU_WaitForInterrupt();	// After WFI, the S3C24A0 enters sleep mode
    }
}