iis.c

支持三星原产的S3C24A0开发板

           rGPDAT |= L3D;               //L3D=H
           
           for(j=0;j<4;j++);             //tcy(L3) > 500ns
           
           rGPDAT |= (L3C | L3D);       //L3C=H,L3D=H
           
           for(j=0;j<4;j++);             //tcy(L3) > 500ns
        }
        else                             //If data's LSB is 'L'
        {
           rGPDAT &= ~L3C;              //L3C=L
           rGPDAT &= ~L3D;              //L3D=L
           for(j=0;j<4;j++);             //tcy(L3) > 500ns
           rGPDAT |= L3C;               //L3C=H
           rGPDAT &= ~L3D;              //L3D=L
           for(j=0;j<4;j++);             //tcy(L3) > 500ns
        }
        data >>= 1;                      //For check next bit
    }
    rGPDAT  = rGPDAT & ~(L3D | L3M | L3C) | (L3C | L3M);    //L3M=H,L3C=H
}

//===================================================================
void __irq DMA1_IISSDO_Done(void)
{
    int i=0;
    rSUBSRCPND = BIT_SUB_DMA1;
    rSUBSRCPND;
    rSRCPND = BIT_DMA;                 //Clear pending bit
    rINTPND = BIT_DMA;
    rINTPND;

//    while((rDSTAT1&0xfffff)==0) {	// Check wheather CURR_TC is updated.
//    i++;
//    }

    WrUTXH0('@');
//    Uart_Printf("(i=%d) ", i);
    if(!which_Buf)
        which_Buf = 1;
    else
        which_Buf = 0;
  	
//    rDISRC1  = (int)(Buf + 0x30);				//0x11000030~(Remove header)		
}

//===================================================================
void __irq DMA0_IISSDI_Done(void)
{
    rSUBSRCPND = BIT_SUB_DMA0;
    rSUBSRCPND;    
    rSRCPND = BIT_DMA;                 //Clear pending bit
    rINTPND = BIT_DMA;
    rINTPND;

    Rec_Done = 1;
}

//===================================================================
void __irq Rx_IIS_Int(void)
{
    rSUBSRCPND = BIT_SUB_RXD0;          //Clear pending bit (Requested)
    rSUBSRCPND;

    ClearPending(BIT_UART0);

    *_temp ++= RdURXH0(); 
}

//===================================================================
void __irq IIS_Muting(void)
{

	if(rEINTPEND==(1<<0))
		{
		//Delay(1000); For Key bouncing protect!!
		//Uart_Printf("EINT0 interrupt is occured\n");
		rEINTPEND=(1<<0);
		}
	else if(rEINTPEND==(1<<1))
		{
		Uart_Printf("EINT1 interrupt is occured\n");
		rEINTPEND=(1<<1);
		}
	else
		{
		Uart_Printf("rEINTPEND=%x\n",rEINTPEND);
		rEINTPEND=((1<<0)|(1<<1));
		}
	ClearPending(BIT_EINT0_2);

    rEINTMASK = 0x7ffff;
    rINTMSK |= (BIT_EINT0_2);
//    rEINTPEND=(1<<0);
//    ClearPending(BIT_EINT0_2);	

    if(mute)    //Mute
    {
        _WrL3Addr(0x14 + 0);            //DATA0 (000101xx+00)
        _WrL3Data(0xa4,0);              //10,1,00,1,00 : after, no de-emp, mute, flat 
        mute = 0;
        Uart_Printf("=== Mute ===\n");
    }
    else        //No mute
    {
        _WrL3Addr(0x14 + 0);            //DATA0 (000101xx+00)
        _WrL3Data(0xa0,0);              //10,1,00,0,00 : after, no de-emp, no mute, flat 
        mute = 1;
        Uart_Printf("=== No Mute ===\n");
    }

    
    rEINTMASK&=~(1<<0);	
    rINTMSK    &= ~(BIT_EINT0_2);	
}

//=======[ Added Slave mode Test Program as Bellow --> July 24, 2002 Tark, SOP ]=====

volatile int Tx_Done;
volatile int Rx_Done;

void __irq TR_Done(void)
{

    rSUBSRCPND = BIT_SUB_DMA0;
    rSUBSRCPND;
    ClearPending(BIT_DMA);     //Clear pending bit

    Rx_Done = 1;
    Tx_Done = 1;
    WrUTXH0('.');
}

//===================================================================
void Iis_Tx(void)
{
    unsigned int i, j;
    unsigned short *txdata;

    Tx_Done = 0;
    Uart_TxEmpty(0);

    Uart_Printf("[ IIS Slave Tx test ]\n");

    IIS_PortSetting();

      //Tx DATA initialize 
    txdata = (unsigned short *)0x11000000;
    
    for(i=0;i<DataCount;i++)
        *(txdata+i) = i;    
	
      //IIS 384fs Initialize
      //Slave[8],Tx[7:6],L-ch=low[5],MSB[4],16bit ch[3],CDCLK[2]=384fs,IISCLK[1:0]=32fs
    rIISMOD  = (1<<8) + (2<<6) + (0<<5) + (1<<4) + (1<<3) + (1<<2) + (1<<0);
    rIISPSR = (2<<5) + 2;   //Prescaler A,B=2 <- FCLK 203.2128MHz(1:2:4)  <- (PCLK = 50.8032MHz)/3 = 16.9344MHz  
    rIISFCON = (0<<15) + (1<<13);       //Tx Normal[15],Tx FIFO Enable[13] --> start piling....  
      //Tx DMA disable[5],Rx DMA disable[4],Tx not idle[3],Rx idle[2],prescaler disable[1],stop[0]
    rIISCON  = (0<<5) + (0<<4) + (0<<3) + (1<<2) + (0<<1) + (0<<0);       
/*
      //IIS Initialize
      //Slave[8],Tx[7:6],L-ch=low[5],MSB[4],16bit ch[3],CDCLK[2]=256fs,IISCLK[1:0]=32fs
    rIISMOD  = (1<<8) + (2<<6) + (0<<5) + (1<<4) + (1<<3) + (0<<2) + (1<<0);
    rIISPSR  = (2<<5) + 2;              //Prescaler_A/B=2 <- FCLK 135.4752MHz(1:2:4),11.2896MHz(256fs),44.1KHz
    rIISFCON = (0<<15) + (1<<13);       //Tx Normal[15],Tx FIFO Enable[13] --> start piling....  
      //Tx DMA disable[5],Rx DMA disable[4],Tx not idle[3],Rx idle[2],prescaler disable[1],stop[0]
    rIISCON  = (0<<5) + (0<<4) + (0<<3) + (1<<2) + (0<<1) + (0<<0);            
   */
      //Tx start
    rIISCON |=0x1;
    
    for(i=0;i<DataCount;i++)
    {
        while( (rIISCON & 0x080) == 0x80 );     //wait when fifo is not empty.
        *(volatile unsigned *)IISFIFO = *(txdata+i);                 // put the data into fifo        
    }

      //Tx Stop(Slave)
    Delay(10);
    rIISCON     = 0x0;          //IIS stop
    rDMASKTRIG0 = (1<<2);       //DMA0 stop
    rIISFCON    = 0x0;          //for FIFO flush

    Uart_Printf("\nTx End...\n");

    Uart_Printf("Last 256 Half-Word in 65KBytes transferred data\n");
    
    for(i=0;i<DataDisplay;i++)
    {
        Uart_Printf("0x%x=",(txdata+0xff00+i));
        Uart_Printf("%04x   ",*(txdata+0xff00+i));        
    }
}
  
//===================================================================
void Iis_Rx(void)
{
    unsigned int i, j, k, count;
    unsigned short *rxdata;

    Rx_Done = 0;
    Uart_TxEmpty(0);

#if PollMode
    Uart_Printf("[ IIS Master Rx Polling mode test ]\n");
#endif

#if DMA0Mode
    Uart_Printf("[ IIS Master Rx DMA0 mode test ]\n");
#endif
    
    IIS_PortSetting();

    pISR_DMA= (unsigned)TR_Done;

    rINTSUBMSK = ~(BIT_SUB_DMA0);
    rINTMSK  = ~(BIT_DMA);

      //Rx Buf initialize
    rxdata=(unsigned short *)0x11000000;
    
    for(i=0;i<DataCount;i++)
        *(rxdata+i)=0x0;

#if DMA0Mode
      //DMA0 Initialize
    rDISRCC0 = (1<<1) + (1<<0);     //The source is in the system bus(APB), address Fixed
    rDISRC0  = ((U32)IISFIFO);      //Base address (start address) of source to transfer(IISFIFO)
    rDIDSTC0 = (0<<1) + (0<<0);     //The destination is in the system bus (AHB), address Increment.
    rDIDST0  = (int)rxdata;         //Base address (start address) of destination to transfer(0x11000000)
    rDCON0   = (1<<31)+(0<<30)+(1<<29)+(0<<28)+(0<<27)+(2<<24)+(1<<23)+(1<<22)+(1<<20)+(DataCount);
      //Handshake[31], sync PCLK[30], TC int[29], single tx[28], single service[27], I2SSDI[24], I2S request[23], 
      //off-reload[22], half-word[20], Initial transfer count=DataCount      
    rDMASKTRIG0 = (0<<2)+(1<<1)+0;  //No-stop, DMA0 channel on, No-sw trigger 
 
      //IIS Initialize (DMA Mode)
      //Master[8],Rx[7:6],L-ch=low[5],MSB[4],16bit ch[3],CDCLK[2]=384fs,IISCLK[1:0]=32fs
    rIISMOD  = (0<<8) + (1<<6) + (0<<5) + (1<<4) + (1<<3) + (1<<2) + (1<<0);
        rIISPSR = (2<<5) + 2;   //Prescaler A,B=2 <- FCLK 203.2128MHz(1:2:4)  <- (PCLK = 50.8032MHz)/3 = 16.9344MHz    
    rIISFCON = (1<<14) + (1<<12);     //Rx DMA[14],Rx FIFO Enable[12]--> start piling....    
      //Tx DMA disable[5],Rx DMA enable[4],Tx idle[3],Rx not idle[2],prescaler enable[1],stop[0]
    rIISCON  = (0<<5) + (1<<4) + (1<<3) + (0<<2) + (1<<1) + (0<<0);    
#endif

#if PollMode
      //IIS Initialize (Polling Mode)
      //Master[8],Rx[7:6],L-ch=low[5],MSB[4],16bit ch[3],CDCLK[2]=384fs,IISCLK[1:0]=32fs
    rIISMOD  = (0<<8) + (1<<6) + (0<<5) + (1<<4) + (1<<3) + (1<<2) + (1<<0);
        rIISPSR = (2<<5) + 2;   //Prescaler A,B=2 <- FCLK 203.2128MHz(1:2:4)  <- (PCLK = 50.8032MHz)/3 = 16.9344MHz    
    rIISFCON = (0<<14) + (1<<12);     //Rx normal[14],Rx FIFO Enable[12]--> start piling.... 
      //Tx DMA disable[5],Rx DMA disable[4],Tx idle[3],Rx not idle[2],prescaler enable[1],stop[0]
    rIISCON  = (0<<5) + (0<<4) + (1<<3) + (0<<2) + (1<<1) + (0<<0);    
#endif

      //Rx start
    rIISCON |= 0x1;

#if PollMode       //*** Need to Polling mode ***
    count = DataCount;                 
    while(0<count) 
    {
        j = rIISFCON & 0x1f;            //Rx FIFO data count(Read only)=31
        if(j == 0)
        {
            while(!j)
                j = rIISFCON & 0x1f;    //Rx FIFO data count(Read only)=31
         }
        
        for(i=0;i<j;i++)
        {
            count--;
            *rxdata++ = *(unsigned short *)IISFIFO;                   
        }
    }
#endif    

#if DMA0Mode  
    while(!Rx_Done);
#endif


      //Rx Stop(Master)
    Delay(10);
    rIISCON     = 0x0;          //IIS stop
    rDMASKTRIG0 = (1<<2);       //DMA0 stop
    rIISFCON    = 0x0;          //for FIFO flush

    Uart_Printf("Last 256 Half-Word in 65KBytes received data\n");

    rxdata=(unsigned short *)0x11000000;  
    
    for(i=0;i<DataDisplay;i++)
    {
        Uart_Printf("0x%x=", (rxdata+0xff00+i));        
        Uart_Printf("%04x   ",*(rxdata+0xff00+i));                
    }
	
    rINTSUBMSK|=(BIT_SUB_DMA0);
    rINTMSK = (BIT_DMA);
}