iis.c

支持三星原产的S3C24A0开发板

/****************************************************************
 NAME: iis.c
 DESC: S3C24A0A iis Function Test
 HISTORY:
 APR 15, 2003 : ky.shim : draft for S3C24A0X rev0.0
 FEB 13, 2004 : ky.shim : SMDK24A0 rev0.61
 MAR 20,2004 : ky.shim : Modification for 384fs
 ****************************************************************/
#include "24a0addr.h"
#include "24a0lib.h"
#include "def.h"
#include "iis.h"

void ChangeDMA1(void);
void IIS_PortSetting(void);

void _WrL3Addr(U8 data);
void _WrL3Data(U8 data,int halt);

void __irq DMA1_IISSDO_Done(void);
void __irq DMA0_IISSDI_Done(void);
void __irq Rx_IIS_Int(void);
void __irq IIS_Muting(void);

static U32 srcAddress;
U8 *srcPt,*saveSrcPt;
#define srcAddress 0x12000000


#define L3D (1<<15)            //GPDAT[15] = L3DATA
#define L3C (1<<16)            //GPDAT[16] = L3CLOCK
#define L3M (1<<17)            //GPDAT[17] = L3MODE

#define PLAY    0
#define RECORD  1
#define REC_LEN 0x50000       //327,680 Bytes
#define IIS_BUFFER _NONCACHE_STARTADDRESS

#define DataCount   0x10000     //IIS Master/Slave Data Rx/Tx Count
#define DataDisplay 0x100       //IIS Master Data Display Count
//#define DataDisplay 0x10000     //IIS Master Data Display Count
//#define DataCount   0x100       //IIS Master/Slave Data Rx/Tx Count

#define PollMode		0		// Polling Mode
#define DMA0Mode	1		// DMA0 Mode

unsigned char *Buf,*_temp;
unsigned short *rec_buf;

volatile unsigned int size = 0;
volatile unsigned int   fs = 0;
volatile char    which_Buf = 1;
volatile char     Rec_Done = 0;
volatile char         mute = 1;

//------------------------------------------------------------------------------
//      SMDK24A0 IIS Configuration
// GPDAT15 = L3DATA, GPDAT16 = L3CLOCK, GPDAT17 = L3MODE
//------------------------------------------------------------------------------
void * func_iis_test[][2]=
{	
	//IIS Controller
	(void *)Play_Iis,						"Play IIS UDA1341       ",	
	(void *)Record_Iis, 					"Reco IIS UDA1341       ",
	(void *)Iis_Tx,						"IIS Slave Set Test 	",
	(void *)Iis_Rx,						"IIS Master Set Test	",
	(void *)Test_IisRecPlay,			    "IIS Reco&Play Test     ",	
	0,0
};

void Ch14_IIS(void)
{
	int i;
	
	Uart_Printf("\n======  IIS Controller Test program start ======\n");
		
	while(1)
	{
		i=0;
		Uart_Printf("\n\n");
		while(1)
		{   //display menu
			Uart_Printf("%2d:%s",i,func_iis_test[i][1]);
			i++;
			if((int)(func_iis_test[i][0])==0)
			{
				Uart_Printf("\n");
				break;
			}
			if((i%4)==0)
			Uart_Printf("\n");
		}

		Uart_Printf("\nPress Enter key to exit : ");
		i = Uart_GetIntNum();
		if(i==-1) break;		// return.
		if(i>=0 && (i<((sizeof(func_iis_test)-1)/8)) )	// select and execute...
			( (void (*)(void)) (func_iis_test[i][0]) )();
	}
	
	Uart_Printf("\n====== IIS Controller Test program end ======\n");
}

//*********************[ Test_Iis ] *********************************
void Play_Iis(void)
{
    unsigned int save_GPCON_M, save_GPCON_L, save_GPPU;
    int Intr_Time_Arg=0;	
		int i;
	
    Uart_Printf("[ IIS (Master Mode) Test (Play Using UDA1341 Codec) ]\n");
    Uart_TxEmpty(0);
    
    save_GPCON_M  = rGPCON_M;         
    save_GPCON_L  = rGPCON_L;     	
    save_GPPU = rGPPU;

    IIS_PortSetting();
    //Uart_Printf("rGPCON_M,rGPPU 0x%x 0x%x\n",rGPCON_M,rGPPU);
	
    pISR_UART0 = (unsigned)Rx_IIS_Int;
    pISR_DMA  = (unsigned)DMA1_IISSDO_Done;
    pISR_EINT0_2= (unsigned)IIS_Muting;

    rEINTPEND = 0xffffff;
    rSRCPND = BIT_EINT0_2; //to clear the previous pending states
    rINTPND = BIT_EINT0_2;
    
    rEINTMASK=~(1<<0);	
    rINTMSK    = ~(BIT_EINT0_2 | BIT_UART0 | BIT_DMA);
    rINTSUBMSK = ~(BIT_SUB_RXD0|BIT_SUB_DMA1);
   
    //Non-cacheable area = 0x11000000 ~ 0x13cf0000
    Buf   = (unsigned char *)IIS_BUFFER;
    _temp = Buf;

    Uart_Printf("Download the PCM(no ADPCM) file by DNW serial port(With header)!!\n");
    Uart_Printf("Download address is %xh\n", Buf);
    while(((unsigned int)_temp - (unsigned int)Buf) < 4)
    {
       Led_Display(0);
       Delay(1500);
       Led_Display(15);
       Delay(1500);
    }
    size = *(Buf) | *(Buf + 1)<<8 | *(Buf + 2)<<16 | *(Buf + 3)<<24;
    Uart_Printf("\nNow, Downloading... [ File Size : %7d(      0)]",size);
    while(((unsigned int)_temp - (unsigned int)Buf) < size){
	  Uart_Printf("\b\b\b\b\b\b\b\b%7d)",(unsigned int)_temp - (unsigned int)Buf);
		Delay(5000);
    }
    Uart_Printf("\b\b\b\b\b\b\b\b%7d)]\n",(unsigned int)_temp - (unsigned int)Buf);

    rINTSUBMSK |= BIT_SUB_RXD0;
    rINTMSK  |= BIT_UART0;
    size = *(Buf + 0x2c) | *(Buf + 0x2d)<<8 | *(Buf + 0x2e)<<16 | *(Buf + 0x2f)<<24;
    size = (size>>1)<<1;	//for 44B0X
    fs   = *(Buf + 0x1c) | *(Buf + 0x1d)<<8 | *(Buf + 0x1e)<<16 | *(Buf + 0x1f)<<24;

    Uart_Printf("Sample Size = 0x%x\n",size/2);
    Uart_Printf("Sampling Frequency = %d Hz\n",fs);
    Uart_Printf("\n[ Now play the wave file .....]\n");
    Uart_Printf("If you want to mute or no mute push the 'EIN0' key repeatedly\n");

    // Modified function test(2410->2440->24A0)
    //Uart_Printf("Select Autoreload Interrupt occuring time\n");
    //Uart_Printf("(0:When TC=0, 1:After autoreload is perfomed) : ");
    //Intr_Time_Arg = Uart_GetIntNum();
	
    Init1341(PLAY);

      //DMA1 Initialize
    rDISRC1  = (int)(Buf + 0x30);               //0x11000030~(Remove WAV. header)      
    rDISRCC1 = (0<<1) + (0<<0);                 //The source is in the system bus(AHB), Increment      
    rDIDST1  = ((U32)IISFIFO);                  //IISFIFO    
    rDIDSTC1 = (Intr_Time_Arg<<2) + (1<<1) + (1<<0);                 //The destination is in the peripheral bus(APB), Fixed  
    rDCON1   = (1<<31)+(0<<30)+(1<<29)+(0<<28)+(0<<27)+(2<<24)+(1<<23)+(0<<22)+(1<<20)+(size/2);
      //Handshake[31], Sync PCLK[30], CURR_TC Interrupt Request[29], Single Tx[28], Single service[27], 
      //I2SSDO[26:24], DMA source selected[23],Auto-reload[22], Half-word[21:20], size/2[19:0]
      
    rDMASKTRIG1 = (0<<2) + (1<<1) + (0<<0);          //No-stop[2], DMA2 channel On[1], No-sw trigger[0] 

      //IIS 384fs Initialize
    if(fs==44100)               //16.9344MHz(384fs)
    {
        rIISPSR = (2<<5) + 2;   //Prescaler A,B=2 <- FCLK 203.2128MHz(1:2:4)  <- (PCLK = 50.8032MHz)/3 = 16.9344MHz      
    }
    else if(fs==22050)       //8.4672MHz(384fs)
    {
        rIISPSR = (5<<5) + 5;   //Prescaler A,B=5 <- (PCLK = 50.8032MHz)/6 = 8.4672MHz    
    }
    rIISCON = (1<<5) + (1<<2) + (1<<1);         //Tx DMA enable[5], Rx idle[2], Prescaler enable[1]
      //Master mode[8],Tx mode[7:6],Low for Left Channel[5],IIS format[4],16bit ch.[3],CDCLK 384fs[2],IISCLK 32fs[1:0]
    rIISMOD = (0<<8) + (2<<6) + (0<<5) + (0<<4) + (1<<3) + (1<<2) + (1<<0);      

	  
/*	  
    //ChangeMPllValue(82,4,1);  //FCLK=90.316800MHz, PCLK=45.158400MHz <-- 5.644800MHz*8
    //ChangeClockDivider(0,1);		  // 1:1:2    
    //ChangeSdramParameter(HCLK); 
    //Uart_Init(45158400,115200);
      //IIS 256fs Initialize
    if(fs==44100)               //11.2896MHz(256fs)
    {
        rIISPSR = (2<<5) + 2;   //Prescaler A,B=2 <- FCLK 135.4752MHz(1:2:4)  <- (PCLK = 33.857142MHz)/3 = 11.2896MHz      
    }
    else if(fs==22050)                        //fs=22050, 5.644800MHz(256fs)
    {
        rIISPSR = (7<<5) + 7;   //Prescaler A,B=7 <- (PCLK = 45MHz)/8 = 5.625MHz    
    }
    rIISCON = (1<<5) + (1<<2) + (1<<1);         //Tx DMA enable[5], Rx idle[2], Prescaler enable[1]
      //Master mode[8],Tx mode[7:6],Low for Left Channel[5],IIS format[4],16bit ch.[3],CDCLK 256fs[2],IISCLK 32fs[1:0]
    rIISMOD = (0<<8) + (2<<6) + (0<<5) + (0<<4) + (1<<3) + (0<<2) + (1<<0);
*/
    
    rIISFCON = (1<<15) + (1<<13);        //Tx DMA,Tx FIFO --> start piling....
    //rEINTPEND = 0xffffff;
    Uart_Printf("\nPress any key to exit!!!\n");
      //IIS Tx Start
    rIISCON |= 0x1;             //IIS Interface start
    while(!Uart_GetKey());

      //IIS Tx Stop
    Delay(10);                   //For end of H/W Tx
    rIISCON      = 0x0;          //IIS Interface stop
    rDMASKTRIG1  = (1<<2);       //DMA1 stop
    rIISFCON     = 0x0;          //For FIFO flush
    
    size = 0;
    
    rGPCON_M = save_GPCON_M;
    rGPCON_L = save_GPCON_L;	
    rGPPU = save_GPPU;

    rINTSUBMSK|=(BIT_SUB_DMA1);
    rINTMSK |= (BIT_DMA | BIT_UART0 | BIT_EINT0_2);
    rEINTMASK=0xffffff;
	
    //(0,0)=1:1:1, (0,1)=1:1:2, (1,0)=1:2:2 (1,1)=1:2:4, (2,0)=1:4:5, (2,1)=1:4:8
    ChangeClockDivider(1,1);
    //(76,4,1)=84Mhz,  (93,4,1)=101Mhz, (54,1,1)=124Mhz, (68,4,0)=152Mhz
    //(93,4,0)=202Mhz, (47,1,0)=220Mhz, (72,2,0)=240Mhz, (79,2,0)=261Mhz
    //(195,10,0)=203MHz, (60,2,0)=204MHz	
    //ChangeMPllValue(195,10,0);// FCLK=203MHz   
    ChangeMPllValue(60,2,0);// FCLK=204Mhz 
    ChangeSdramParameter(HCLK);
    Uart_Init(0,115200);
	
    mute = 1;

}



//**************** [ Record_Iis ] ***************************************
void Record_Iis(void)
{
    unsigned int save_GPCON_M, save_GPCON_L, save_GPPU;
    int Intr_Time_Arg=0;
    Uart_Printf("[ IIS (Master Mode) Test (Record Using UDA1341 codec) ]\n");	
    Uart_TxEmpty(0);
 
    save_GPCON_M  = rGPCON_M;         
    save_GPCON_L  = rGPCON_L;     	
    save_GPPU = rGPPU;

    IIS_PortSetting();
        
      //--- Record Buf initialize
      //Non-cacheable area = 0x11000000 ~ 0x13ff0000
    rec_buf = (unsigned short *)IIS_BUFFER;

    pISR_DMA  = (unsigned)DMA0_IISSDI_Done;
    pISR_EINT0_2= (unsigned)IIS_Muting;

    rINTMSK = ~(BIT_DMA);
    rINTSUBMSK = ~(BIT_SUB_DMA0);
    
    Init1341(RECORD);

      //--- DMA0 Initialize
    rDISRCC0 = (1<<1) + (1<<0);                         //APB, Fix  
    rDISRC0  = ((U32)IISFIFO);                          //IISFIFO
    rDIDSTC0 = (0<<1) + (0<<0);                         //AHB, Increment
    rDIDST0  = (int)rec_buf;                            //0x11000000 ~
    rDCON0   = (1<<31)+(0<<30)+(1<<29)+(0<<28)+(0<<27)+(2<<24)+(1<<23)+(1<<22)+(1<<20)+REC_LEN;
      //Handshake, sync PCLK, TC int, single tx, single service, I2SSDI, I2S Rx request, 
      //Off-reload, half-word, 0x50000 half word.
    rDMASKTRIG0 = (0<<2) + (1<<1) + 0;    //No-stop, DMA1 channel on, No-sw trigger
    
      //IIS 384fs Initialize
    if(fs==44100)               //16.9344MHz(384fs)
    {
        rIISPSR = (2<<5) + 2;   //Prescaler A,B=2 <- FCLK 203.2128MHz(1:2:4)  <- (PCLK = 50.8032MHz)/3 = 16.9344MHz      
    }
    else if(fs==22050)       //8.4672MHz(384fs)
    {
        rIISPSR = (5<<5) + 5;   //Prescaler A,B=5 <- (PCLK = 50.8032MHz)/6 = 8.4672MHz    
    }
    rIISMOD = (0<<8) + (1<<6) + (0<<5) + (0<<4) + (1<<3) + (1<<2) + (1<<0);
      //Master,Rx,L-ch=low,IIS,16bit ch,CDCLK=384fs,IISCLK=32fs    
    rIISCON = (0<<5) + (1<<4) + (1<<3) + (0<<2) + (1<<1);
      //Tx DMA disable,Rx DMA enable,Tx idle,Rx not idle,prescaler enable,stop