usb_drv.c

8032底层驱动部分。因为可以移植 所以单独来拿出来

		g_UsbDrvInfo.ep_out_enb_state[no-1] = USB_EP_ENB_NORMAL;
		/* The first expect received packet is data0*/
		g_UsbDrvInfo.ep_out_data01[no-1] = 0;
		// configure BDT to receive data
		WRITE_EPN_BDT_PID(no, USB_BDT_RX, 
								(g_UsbDrvInfo.ep_out_max_data_size[no-1] << VUSB_BDT_BC_SHIFT) |
								(g_UsbDrvInfo.ep_out_data01[no-1]<<VUSB_BDT_DATA01_SHIFT) |
								VUSB_BDT_DTS_BIT | VUSB_BDT_OWNS_BIT);
		g_UsbDrvInfo.ep_out_data01[no-1]^=1;
	}
#else	
	DRV_WriteReg8(USB_INDEX, no);

	if(bDMA == KAL_TRUE)
	{
		DRV_Reg8(USB_INTROUT1E) = DRV_Reg8(USB_INTROUT1E) & (~(USB_INTROUT1E_EP0 << no));
		DRV_WriteReg8(USB_OUTCSR1,(USB_OUTCSR1_CLRDATATOG | USB_OUTCSR1_FLUSHFIFO));
		DRV_WriteReg8(USB_OUTCSR1,(USB_OUTCSR1_CLRDATATOG | USB_OUTCSR1_FLUSHFIFO));
		DRV_WriteReg8(USB_OUTCSR2,0);
		DRV_WriteReg8(USB_OUTCSR2,(USB_OUTCSR2_AUTOCLEAR | USB_OUTCSR2_DMAENAB));
	}
	else
	{
		DRV_WriteReg8(USB_OUTCSR1,(USB_OUTCSR1_CLRDATATOG | USB_OUTCSR1_FLUSHFIFO));
		DRV_WriteReg8(USB_OUTCSR1,(USB_OUTCSR1_CLRDATATOG | USB_OUTCSR1_FLUSHFIFO));	
		DRV_WriteReg8(USB_OUTCSR2,0);
		DRV_Reg8(USB_INTROUT1E) |= (USB_INTROUT1E_EP0 << no);
	}
#endif	
}
	
void USB_OutEPDis(kal_uint8 no, kal_bool bDMA)
{
	if(no==0)
		ASSERT(0);

#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))
	if(g_UsbDrvInfo.ep_out_enb_state[no-1]==USB_EP_ENB_DMA)
		USB_Stop_DMA_Channel(no);
	g_UsbDrvInfo.ep_out_enb_state[no-1] = USB_EP_DIS;
	WRITE_EPN_BDT_PID(no, USB_BDT_RX, 0);
#else	
	DRV_WriteReg8(USB_INDEX, no);
	
	if(bDMA==KAL_TRUE)
	{
		USB_Stop_DMA_Channel(no);	
		DRV_Reg8(USB_INTROUT1E) = DRV_Reg8(USB_INTROUT1E) & (~(USB_INTROUT1E_EP0 << no));
		DRV_WriteReg8(USB_OUTCSR2,0);
	}
	else
	{
		DRV_Reg8(USB_INTROUT1E) = DRV_Reg8(USB_INTROUT1E) & (~(USB_INTROUT1E_EP0 << no));
		DRV_WriteReg8(USB_OUTCSR2,0);
	}
#endif	
}	

/* Clear EP data01, note that ep0 can not use this function */
void USB_InEPClearData01(kal_uint8 no)
{
	if(no==0)
		EXT_ASSERT(0, no, 0, 0);
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))
	g_UsbDrvInfo.ep_in_data01[no-1] = 0;
#endif	
}

/* Clear EP data01, note that ep0 can not use this function */
void USB_OutEPClearData01(kal_uint8 no)
{
	if(no==0)
		EXT_ASSERT(0, no, 0, 0);	
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))	
	g_UsbDrvInfo.ep_out_data01[no-1] = 0;
#endif	
}

/*  read fifo data from EP nEP*/
void USB_EPFIFORead(kal_uint8 nEP, kal_uint16 nBytes, void *pDst)
{
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))
#else
	kal_uint16  nCount = nBytes;
	kal_uint8   *pby;
	kal_uint32  nAddr;
#endif

	if((nBytes!=0) && (pDst==NULL))
		EXT_ASSERT(0, (kal_uint32)nBytes, 0, 0);
	
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))

	// make sure this endpoint status belong to MCU
	if(nEP==0)
	{
		if((READ_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd)&VUSB_BDT_OWNS_BIT)!=0)
			ASSERT(0);
		kal_mem_cpy(pDst, 
					(void*)READ_EP0_BDT_ADDR(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd), 
					nBytes);
	}
	else
	{
		ASSERT(g_UsbDrvInfo.ep_out_enb_state[nEP-1] != USB_EP_DIS);
		ASSERT(nBytes <= g_UsbDrvInfo.ep_out_max_data_size[nEP-1]);
		
		if((READ_EPN_BDT_PID(nEP, USB_BDT_RX)&VUSB_BDT_OWNS_BIT)!=0)
			ASSERT(0);
		kal_mem_cpy(pDst, 
					(void*)READ_EPN_BDT_ADDR(nEP, USB_BDT_RX), 
					nBytes);
	}
#else

	DRV_WriteReg8(USB_INDEX,nEP);
	nAddr = USB_EP0+nEP*4;
	pby = (kal_uint8 *)pDst;

	/* read byte by byte */
	while (nCount) 
	{
		*pby++ = DRV_Reg8(nAddr); 
		nCount--;
	}
#endif	
}


/*  write data to fifo EP nEP*/
void USB_EPFIFOWrite (kal_uint8 nEP, kal_uint16 nBytes, void *pSrc)
{
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))
#else
	kal_uint16 nCount = nBytes;
	kal_uint8 *pby;
	kal_uint32 nAddr;
#endif

	if((nBytes!=0) && (pSrc==NULL))
		EXT_ASSERT(0, (kal_uint32)nBytes, 0, 0);
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))

	
	if(nEP==0)
	{
		// make sure this endpoint status belong to MCU
		if((READ_EP0_BDT_PID(USB_BDT_TX, g_UsbDrvInfo.ep0_tx_even_odd)&VUSB_BDT_OWNS_BIT)!=0)
			ASSERT(0);
		kal_mem_cpy((void*)READ_EP0_BDT_ADDR(USB_BDT_TX, g_UsbDrvInfo.ep0_tx_even_odd),
					pSrc, nBytes);
		WRITE_EP0_BDT_PID(USB_BDT_TX, g_UsbDrvInfo.ep0_tx_even_odd, nBytes<<VUSB_BDT_BC_SHIFT);
	}
	else
	{
		ASSERT(g_UsbDrvInfo.ep_in_enb_state[nEP-1]!=USB_EP_DIS);
		ASSERT(nBytes<=g_UsbDrvInfo.ep_in_max_data_size[nEP-1]);
		
		// make sure this endpoint status belong to MCU
		if((READ_EPN_BDT_PID(nEP, USB_BDT_TX)&VUSB_BDT_OWNS_BIT)!=0)
			ASSERT(0);
		kal_mem_cpy((void*)READ_EPN_BDT_ADDR(nEP, USB_BDT_TX), pSrc, nBytes);
		WRITE_EPN_BDT_PID(nEP, USB_BDT_TX, nBytes<<VUSB_BDT_BC_SHIFT);
	}
#else

	DRV_WriteReg8(USB_INDEX,nEP);
	nAddr = USB_EP0+nEP*4;
	pby = (kal_uint8 *)pSrc;

	/* write by byte */
	while (nCount) 
	{
		DRV_WriteReg8(nAddr,*pby++);
		nCount--;
	}
#endif	
}


/* type == USB_IN_EP_TYPE or USB_OUT_EP_TYPE 
    en == KAL_TRUE means stall this endpoint */
void USB_CtrlEPStall(kal_uint8 EPno, USB_EP_TYPE type, kal_bool en, USB_CTRL_STALL_ENTRY entry)
{
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))
#else
	kal_uint8 CSR1;
#endif

	if((EPno==0)||(EPno>MAX_INTR_EP_NUM))
		EXT_ASSERT(0, (kal_uint32)EPno, (kal_uint32)entry, 0);

#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))
	if (en == KAL_TRUE)
	{
		/* stall endpoint */
		if (type == USB_OUT_EP_TYPE)
		{
			WRITE_EPN_BDT_PID(EPno, USB_BDT_RX, VUSB_BDT_OWNS_BIT|VUSB_BDT_STALL_BIT);
         	g_UsbDrvInfo.ep_out_stall_status[EPno-1] = KAL_TRUE;
         	g_UsbDrvInfo.ep_out_data01[EPno-1] = 0;
        }
		else
		{
			WRITE_EPN_BDT_PID(EPno, USB_BDT_TX, VUSB_BDT_OWNS_BIT|VUSB_BDT_STALL_BIT);
			g_UsbDrvInfo.ep_in_stall_status[EPno-1] = KAL_TRUE;
			g_UsbDrvInfo.ep_in_data01[EPno-1] = 0;
		}
	}
	else
	{
		/* clear stall */
		if (type == USB_OUT_EP_TYPE)
		{
			WRITE_EPN_BDT_PID(EPno, USB_BDT_RX, 0);
			g_UsbDrvInfo.ep_out_stall_status[EPno-1] = KAL_FALSE;
			g_UsbDrvInfo.ep_out_data01[EPno-1] = 0;
		}
		else
		{
			WRITE_EPN_BDT_PID(EPno, USB_BDT_TX, 0);
			g_UsbDrvInfo.ep_in_stall_status[EPno-1] = KAL_FALSE;
			g_UsbDrvInfo.ep_in_data01[EPno-1] = 0;
		}
	}
#else

	if (en == KAL_TRUE)
	{
		/* stall endpoint */
		if (type == USB_OUT_EP_TYPE)
		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR1 = DRV_Reg8(USB_OUTCSR1);
			CSR1 |= USB_OUTCSR1_SENDSTALL;
			DRV_WriteReg8(USB_OUTCSR1,(CSR1|USB_OUTCSR1_FLUSHFIFO|USB_OUTCSR1_CLRDATATOG));
			g_UsbDrvInfo.ep_out_stall_status[EPno-1] = KAL_TRUE;
		}
		else
		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR1 = DRV_Reg8(USB_INCSR1);
			CSR1 |= USB_INCSR1_SENDSTALL;
			DRV_WriteReg8(USB_INCSR1,(CSR1|USB_INCSR1_FLUSHFIFO|USB_INCSR1_CLRDATATOG));
			g_UsbDrvInfo.ep_in_stall_status[EPno-1] = KAL_TRUE;
		}
	}
	else
	{
		/* clear stall */
		if (type == USB_OUT_EP_TYPE)
		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR1 = DRV_Reg8(USB_OUTCSR1);
			CSR1 &= ~USB_OUTCSR1_SENDSTALL;
			DRV_WriteReg8(USB_OUTCSR1,(CSR1|USB_OUTCSR1_FLUSHFIFO|USB_OUTCSR1_CLRDATATOG));
			g_UsbDrvInfo.ep_out_stall_status[EPno-1] = KAL_FALSE;
		}
		else
		{
			DRV_WriteReg8(USB_INDEX, EPno);
			CSR1 = DRV_Reg8(USB_INCSR1);
			CSR1 &= ~USB_INCSR1_SENDSTALL;
			DRV_WriteReg8(USB_INCSR1,(CSR1|USB_INCSR1_FLUSHFIFO|USB_INCSR1_CLRDATATOG));
			g_UsbDrvInfo.ep_in_stall_status[EPno-1] = KAL_FALSE;
		}
	}
#endif	
}

/* get endpoint 0 status. (if transaction end or sent stall interrupt received)  */
void USB_Get_EP0_Status(kal_bool *p_transaction_end, kal_bool *p_sent_stall)
{
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))
	if((READ_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd^1) &VUSB_BDT_STALL_BIT) 
		&& (DRV_Reg8(USB_CTL)&VUSB_CTL_TXD_SUSPEND))
		*p_sent_stall = KAL_TRUE;
	else
		*p_sent_stall = KAL_FALSE;

	if(g_UsbDrvInfo.ep0_transaction_type == USB_EP0_TRANS_END)
		*p_transaction_end = KAL_TRUE;
	else
		*p_transaction_end = KAL_FALSE;
#else	
	kal_uint8 byCSR0;
	
	DRV_WriteReg8(USB_INDEX,0);
	byCSR0 = DRV_Reg8(USB_CSR0);

	if (byCSR0 & USB_CSR0_SENTSTALL) 
		*p_sent_stall = KAL_TRUE;
	else
		*p_sent_stall = KAL_FALSE;
	
	if (byCSR0 & USB_CSR0_SETUPEND) 
		*p_transaction_end = KAL_TRUE;
	else
		*p_transaction_end = KAL_FALSE;
#endif	
}


/* control endpoint 0 registers according to USB_EP0_DRV_STATE */
void USB_Update_EP0_State(USB_EP0_DRV_STATE state, kal_bool stall, kal_bool end)
{
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))
	/* clear sent stall*/
	if(state ==USB_EP0_DRV_STATE_CLEAR_SENT_STALL)
	{
		WRITE_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN)&(~VUSB_BDT_STALL_BIT));
		WRITE_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD)&(~VUSB_BDT_STALL_BIT));
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN, 
							READ_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN)&(~VUSB_BDT_STALL_BIT));
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD, 
							READ_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD)&(~VUSB_BDT_STALL_BIT));
		return;
	}

	/* clear transaction end*/
	if(state ==USB_EP0_DRV_STATE_TRANSACTION_END)
	{
		EXT_ASSERT((g_UsbDrvInfo.ep0_current_dir==0), 0, 0, 0);
		/* clear the data in sent buffer */
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN, 0);
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD, 0);
		WRITE_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd, 
							(USB_EP0_MAXP << VUSB_BDT_BC_SHIFT) |VUSB_BDT_OWNS_BIT);
		g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_NONE;
		return;
	}

	/* ep0 read end or write ready*/
	if((state == USB_EP0_DRV_STATE_READ_END) && (stall==KAL_FALSE))
	{
		/* clear tx suspend for setupt packet*/
		if(DRV_Reg8(USB_CTL)&VUSB_CTL_TXD_SUSPEND)
		{
			g_UsbDrvInfo.ep0_tx_data01 = 0;
			/* clear the data in sent buffer */
			WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN, 0);
			WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD, 0);
			DRV_Reg8(USB_CTL) = DRV_Reg8(USB_CTL)&(~VUSB_CTL_TXD_SUSPEND);
		}	

		WRITE_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd, 
							(USB_EP0_MAXP << VUSB_BDT_BC_SHIFT) |VUSB_BDT_OWNS_BIT);
		g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_RX_DATA;
	}
	else if((state == USB_EP0_DRV_STATE_WRITE_RDY) && (stall==KAL_FALSE))
	{
		/* toggle DATA01*/
		g_UsbDrvInfo.ep0_tx_data01^=1;
		WRITE_EP0_BDT_PID(USB_BDT_TX, g_UsbDrvInfo.ep0_tx_even_odd, 
							(READ_EP0_BDT_PID(USB_BDT_TX, g_UsbDrvInfo.ep0_tx_even_odd)&VUSB_BDT_BC_MASK) 
							|(g_UsbDrvInfo.ep0_tx_data01<<VUSB_BDT_DATA01_SHIFT) 
							| VUSB_BDT_DTS_BIT | VUSB_BDT_OWNS_BIT);
		g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_TX_DATA;
	}
	
	/* error occured, sent stall*/	
	if(stall == KAL_TRUE)
	{
		WRITE_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN)|VUSB_BDT_STALL_BIT);
		WRITE_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD)|VUSB_BDT_STALL_BIT);
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_EVEN, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_EVEN)|VUSB_BDT_STALL_BIT);
		WRITE_EP0_BDT_PID(USB_BDT_TX, USB_BDT_ODD, 
							READ_EP0_BDT_PID(USB_BDT_RX, USB_BDT_ODD)|VUSB_BDT_STALL_BIT);
		g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_NONE;
	}
	/* last data for this transaction, set data end bit*/
	else if(end == KAL_TRUE)
	{
		if(g_UsbDrvInfo.ep0_transaction_type==USB_EP0_TRANS_RX_DATA)
		{
			/* status data01 always 1*/
			g_UsbDrvInfo.ep0_tx_data01 = 1;
			/* byte count 0 */
			WRITE_EP0_BDT_PID(USB_BDT_TX, g_UsbDrvInfo.ep0_tx_even_odd, 
								(g_UsbDrvInfo.ep0_tx_data01<<VUSB_BDT_DATA01_SHIFT) |
								VUSB_BDT_DTS_BIT | VUSB_BDT_OWNS_BIT);
			g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_RX_STATUS;
		}
		else if(g_UsbDrvInfo.ep0_transaction_type==USB_EP0_TRANS_TX_DATA)
		{					
			g_UsbDrvInfo.ep0_transaction_type = USB_EP0_TRANS_TX_DATA_END;
		}
		else
		{
			EXT_ASSERT(0, g_UsbDrvInfo.ep0_transaction_type, state, stall);
		}
	}
#else
	kal_uint8   reg_state;
	kal_uint8   byCSR0;

	/* clear sent stall*/
	if(state ==USB_EP0_DRV_STATE_CLEAR_SENT_STALL)
	{
		DRV_WriteReg8(USB_INDEX,0);   
		byCSR0 = DRV_Reg8(USB_CSR0);
		DRV_WriteReg8(USB_CSR0, byCSR0&(~USB_CSR0_SENTSTALL));
		return;
	}

	/* clear transaction end*/
	if(state ==USB_EP0_DRV_STATE_TRANSACTION_END)
	{
		DRV_WriteReg8(USB_INDEX,0);   
		DRV_WriteReg8(USB_CSR0, (USB_CSR0_SERVICESETUPEND));
		return;
	}

	/* ep0 read end or write ready*/
	if(state == USB_EP0_DRV_STATE_READ_END)
	{
		reg_state = USB_CSR0_SERVICEDOUTPKTRDY;
	}
	else
	{
		reg_state = USB_CSR0_INPKTRDY;
	}

	/* error occured, sent stall*/	
	if(stall == KAL_TRUE)
	{
		reg_state |= USB_CSR0_SENDSTALL; 
	}
	/* last data for this transaction, set data end bit*/
	if(end == KAL_TRUE)
	{
		reg_state |= USB_CSR0_DATAEND; 
	}
	
	DRV_WriteReg8(USB_INDEX,0);   
	DRV_WriteReg8(USB_CSR0, reg_state);
#endif		
}

/* return packet length for endpoint 0*/
kal_uint32 USB_EP0_Pkt_Len(void)
{
	kal_uint32 nCount = 0;
	
#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))
	if((READ_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd) &VUSB_BDT_OWNS_BIT)==0)
	{
		nCount = (READ_EP0_BDT_PID(USB_BDT_RX, g_UsbDrvInfo.ep0_rx_even_odd) & VUSB_BDT_BC_MASK)
				>>VUSB_BDT_BC_SHIFT;
	}
#else	
	kal_uint8 byCSR0;
	
	DRV_WriteReg8(USB_INDEX,0);
	byCSR0 = DRV_Reg8(USB_CSR0);
	
	if(byCSR0 & USB_CSR0_OUTPKTRDY)
	{