usb_hw.h

8032底层驱动部分。因为可以移植 所以单独来拿出来

/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2005
*
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*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
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*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
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/*****************************************************************************
 *
 * Filename:
 * ---------
 * usb_hw.h
 *
 * Project:
 * --------
 *   Maui_Software
 *
 * Description:
 * ------------
 *  This file intends for usb hardware register definitions
 *
 * Author:
 * -------
 * -------
 *
 *==============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
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 *============================================================================
 ****************************************************************************/
#ifndef USB_HW_H
#define USB_HW_H

#define USB_base		0x70000000

#if ( defined(MT6228) || defined(MT6229) || defined(MT6230))

#define OTG_INT_STAT				(USB_base+0x10)
#define OTG_INT_EN					(USB_base+0x14)
#define OTG_STATUS					(USB_base+0x18)
#define OTG_CTRL					(USB_base+0x1c)

#define USB_FM_PKT_NUML				(USB_base+0x20)
#define USB_FM_PKT_NUMH				(USB_base+0x24)
#define USB_FM_ERR_STAT				(USB_base+0x28)
#define USB_FM_CTL					(USB_base+0x2c)
#define USB_FM_PKT_CNTL				(USB_base+0x30)
#define USB_FM_PKT_CNTH				(USB_base+0x34)
#define USB_FM_TIMEOUT				(USB_base+0x38)
#define USB_FM_STATUS				(USB_base+0x3c)
#define USB_FM_ADDITNL_STAT			(USB_base+0x50)
#define USB_FM_ENDPT				(USB_base+0x68)
#define USB_FM_INT_MASK				(USB_base+0x6c)
#define USB_PHY_EXTRA				(USB_base+0x70)

#define USB_INT_STAT				(USB_base+0x80)
#define USB_INT_ENB					(USB_base+0x84)
#define USB_ERR_STAT				(USB_base+0x88)
#define USB_ERR_ENB					(USB_base+0x8c)
#define USB_STAT					(USB_base+0x90)
#define USB_CTL						(USB_base+0x94)
#define USB_ADDR					(USB_base+0x98)
#define USB_BDT_PAGE_01				(USB_base+0x9c)
#define USB_BDT_PAGE_02				(USB_base+0xb0)
#define USB_BDT_PAGE_03				(USB_base+0xb4)
#define USB_FRM_NUML				(USB_base+0xa0)
#define USB_FRM_NUMH				(USB_base+0xa4)
#define USB_TOKEN					(USB_base+0xa8)
#define USB_SOF_THLD				(USB_base+0xac)
#define USB_ENDPT_CTL_BASE			(USB_base+0xc0)
#define USB_ENDPT_CTL(n)			(USB_ENDPT_CTL_BASE+4*n)	

#define USB_DMA_ENB					(USB_base+0x410)
#define USB_DMA_DIS					(USB_base+0x414)
#define USB_DMA_ADDR_CNTER_CLR		(USB_base+0x418)
#define USB_DMA_FM_SELECT			(USB_base+0x41c)
#define USB_SOFT_RST				(USB_base+0x420)
#define USB_PHY_CTL					(USB_base+0x450)

#define USB_FIFO_RX0_EVEN			(USB_base+0x200)
#define USB_FIFO_RX0_ODD			(USB_base+0x208)
#define USB_FIFO_TX0_EVEN			(USB_base+0x210)
#define USB_FIFO_TX0_ODD			(USB_base+0x218)
#define USB_FIFO_RX1				(USB_base+0x220)
#define USB_FIFO_TX1				(USB_base+0x260)
#define USB_FIFO_RX2				(USB_base+0x2a0)
#define USB_FIFO_TX2				(USB_base+0x2e0)
#define USB_FIFO_RX3				(USB_base+0x320)
#define USB_FIFO_TX3				(USB_base+0x328)


#define USB_BDT_RX0_EVEN			(USB_base+0x330)
#define USB_BDT_RX0_ODD				(USB_base+0x338)
#define USB_BDT_TX0_EVEN			(USB_base+0x340)
#define USB_BDT_TX0_ODD				(USB_base+0x348)
#define USB_BDT_RX1					(USB_base+0x350)
#define USB_BDT_TX1					(USB_base+0x358)
#define USB_BDT_RX2					(USB_base+0x360)
#define USB_BDT_TX2					(USB_base+0x368)
#define USB_BDT_RX3					(USB_base+0x370)
#define USB_BDT_TX3					(USB_base+0x378)

/* VUSB Endpoint control register masks */
/* Define the bits within the endpoint control register */
#define VUSB_ENDPT_HSHK_BIT			(0x01)
#define VUSB_ENDPT_STALL_BIT 		(0x02)
#define VUSB_ENDPT_TX_EN_BIT		(0x04)
#define VUSB_ENDPT_RX_EN_BIT		(0x08)
#define VUSB_ENDPT_CTL_EP_CTL_DIS	(0x10)
#define VUSB_ENDPT_CTL_RETRY_DIS	(0x40)
#define VUSB_ENDPT_CTL_HOST_WO_HUB	(0x80)

#define VUSB_ENDPT_DISABLE			(0x00)
#define VUSB_ENDPT_CONTROL			(VUSB_ENDPT_HSHK_BIT | VUSB_ENDPT_TX_EN_BIT | \
										VUSB_ENDPT_RX_EN_BIT | VUSB_ENDPT_CTL_RETRY_DIS)
#define VUSB_ENDPT_BULK_RX			(VUSB_ENDPT_HSHK_BIT | VUSB_ENDPT_RX_EN_BIT | \
										VUSB_ENDPT_CTL_EP_CTL_DIS | VUSB_ENDPT_CTL_RETRY_DIS)
#define VUSB_ENDPT_BULK_TX			(VUSB_ENDPT_HSHK_BIT | VUSB_ENDPT_TX_EN_BIT | \
										VUSB_ENDPT_CTL_EP_CTL_DIS | VUSB_ENDPT_CTL_RETRY_DIS)
#define VUSB_ENDPT_BULK_BIDIR		(VUSB_ENDPT_HSHK_BIT | VUSB_ENDPT_TX_EN_BIT | \
										VUSB_ENDPT_RX_EN_BIT | VUSB_ENDPT_CTL_EP_CTL_DIS | VUSB_ENDPT_CTL_RETRY_DIS)
#define VUSB_ENDPT_ISO_RX			(VUSB_ENDPT_RX_EN_BIT | VUSB_ENDPT_CTL_EP_CTL_DIS | \
										VUSB_ENDPT_CTL_RETRY_DIS)
#define VUSB_ENDPT_ISO_TX			(VUSB_ENDPT_TX_EN_BIT | VUSB_ENDPT_CTL_EP_CTL_DIS | \
										VUSB_ENDPT_CTL_RETRY_DIS)
#define VUSB_ENDPT_ISO_BIDIR		(VUSB_ENDPT_RX_EN_BIT | VUSB_ENDPT_TX_EN_BIT | \
										VUSB_ENDPT_CTL_EP_CTL_DIS | VUSB_ENDPT_CTL_RETRY_DIS)										

/* VUSB Control register masks */
#define  VUSB_CTL_USB_EN			(0x01)
#define  VUSB_CTL_SOF_EN			(0x01)
#define  VUSB_CTL_ODD_RST			(0x02)
#define  VUSB_CTL_RESUME			(0x04)
#define  VUSB_CTL_HOST_MODE_EN		(0x08)
#define  VUSB_CTL_RESET				(0x10)
#define  VUSB_CTL_TOKEN_BUSY		(0x20)
#define  VUSB_CTL_TXD_SUSPEND		(0x20)
#define  VUSB_CTL_SINGLE_ENDED_0	(0x40)
#define  VUSB_CTL_JSTATE			(0x80)

/* VUSB Interrupt status register masks */
#define VUSB_INT_STAT_RESET			(0x01)
#define VUSB_INT_STAT_ERROR			(0x02)
#define VUSB_INT_STAT_SOF			(0x04)
#define VUSB_INT_STAT_TOKEN_DONE	(0x08)
#define VUSB_INT_STAT_SLEEP			(0x10)
#define VUSB_INT_STAT_RESUME		(0x20)
#define VUSB_INT_STAT_ATTACH		(0x40)
#define VUSB_INT_STAT_STALL			(0x80)

/* VUSB Interrupt enable register masks*/
#define VUSB_INT_ENB_RESET			(0x01)
#define VUSB_INT_ENB_ERROR			(0x02)
#define VUSB_INT_ENB_SOF			(0x04)
#define VUSB_INT_ENB_TOKEN_DONE		(0x08)
#define VUSB_INT_ENB_SLEEP			(0x10)
#define VUSB_INT_ENB_RESUME			(0x20)
#define VUSB_INT_ENB_ATTACH			(0x40)