startup.s

S3C6410 Startup Code,包括nand和onenand2种启动代码

;/*************************************************************************************
; 
;	Project Name : S3C6410 Validation
;
;	Copyright 2006 by Samsung Electronics, Inc.
;	All rights reserved.
;
;	Project Description :
;		This software is only for validating functions of the S3C6410.
;		Anybody can use this software without our permission.
;  
;--------------------------------------------------------------------------------------
; 
;	File Name : startup.s
;  
;	File Description : This file implements the startup procedure.
;
;	Author	: Haksoo,Kim
;	Dept. : AP Development Team
;	Created Date : 2006/11/08
;	Version : 0.1 
; 
;	History
;	- Created(Haksoo,Kim 2006/11/08)
;   - Added InitSyscon (Wonjoon.jang 2007/01/31)
;  
;*************************************************************************************/

				GET		option.inc
				GET		sfr6410.inc

				MACRO
$HandlerLabel 	HANDLER		$HandleLabel

$HandlerLabel
				sub		sp,sp,#4        	;decrement sp(to store jump address)
				stmfd	sp!,{r0}        	;PUSH the work register to stack(lr doesnt push because it return to original address)
				ldr     r0,=$HandleLabel	;load the address of HandleXXX to r0
				ldr     r0,[r0]         	;load the contents(service routine start address) of HandleXXX
				str     r0,[sp,#4]      	;store the contents(ISR) of HandleXXX to stack
				ldmfd   sp!,{r0,pc}     	;POP the work register and pc(jump to ISR)

				MEND

				IMPORT	InitDmc				;DMC initialize

;=======================================================
;						ENTRY  
;=======================================================

				AREA    Init,CODE,READONLY

				ENTRY 

				b		ResetHandler
				b		HandlerUndef
				b		HandlerSWI
				b		HandlerPabort
				b		HandlerDabort
				b		.
			    b		HandlerIRQ
				b		HandlerFIQ

HandlerUndef	HANDLER HandleUndef
HandlerSWI		HANDLER HandleSWI
HandlerPabort	HANDLER HandlePabort
HandlerDabort	HANDLER HandleDabort
HandlerIRQ		HANDLER	HandleIRQ
HandlerFIQ		HANDLER	HandleFIQ


ResetHandler
	[	(SILICON)
				bl		InitSyscon			
	]
	;			bl		InitSmc
				bl		InitDmc
				
			;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
			;; memport1 drive strength change 3mA->7mA
			;;
			ldr r3, =0x7F0081D4
			ldr r4, =0x55555555
			str r4, [r3]
			;;			
			;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

				IMPORT  __main 				
			   	bl		__main		   	
	
			   	b		.
;=======================================================			   	

;------------[Syscon Initialize Routine]----------------
InitSyscon		PROC

				; Peri Port Setup
				; Disable WatchDog
				; Operating Mode Change
				; Set PLL LockTime
				; Set PMS valuse and enable PLL
				; Set Clock Divider
				; Select Clock Source for SYSCLK
				; Expand DRAM Port
				
				ldr		r0,	=0x70000013			; Peri. Port Setup
				mcr		p15,0,r0,c15,c2,4		; 256M(0x7000_0000 ~ 0x7fff_ffff
				
				ldr		r0,	=rWTCON				; Disable WatchDog
				mov		r1,	#0
				str		r1,[r0]
	[	(SYNCMODE)								; Operating Mode Change
				ldr		r0, =rOTHERS
				ldr		r1, [r0]
				mov		r2, #0x40				; rOTHERS[6] = "1"
				orr		r1,	r1, r2
				str		r1,	[r0]				; SYNCMUXSEL
				
				;DELAY
				NOP
				NOP
				NOP
				NOP
				NOP
				
				ldr		r2, =((1<<7))			; SYNCMODE, 			
				orr		r1,	r1, r2
				str		r1, [r0]				; Assert SYNCACK, VICSYNCEN
				
Check_SYNCACK
				ldr		r1, [r0]
				ldr		r2, =(0xF<<8)
				and		r1, r1, r2				; rOTHERS[11:8]
				cmp		r1, #0xF00
				bne		Check_SYNCACK			
	]			
	
				mov		r1, #0xff00
				orr		r1,r1,#0xff				; Lock Time Value, Fin=12MHz - 0x4B1(min)
				
				ldr		r0, =rAPLL_LOCK			; APLL Lock Time
				str		r1, [r0]
				
				str		r1, [r0,#0x4]			; MPLL Lock Time
				
	
				;;Set Clock Divider0
				ldr		r1,	[r0,#0x20]			; Load Clock Divider Value
				bic   r1, #0x30000
				bic		r1, #0xff00
				bic		r1, #0xff
				ldr		r2, =((PCLK_DIV<<12)|(HCLKx2_DIV<<9)|(HCLK_DIV<<8)|(MPLL_DIV<<4)|(APLL_DIV<<0))
				orr		r1,r1,r2			
				str		r1,	[r0,#0x20]			; CLK_DIV0 Register
								
				;; APLL M,P,S Value & Enable
				ldr		r1, =((1<<31)|(APLL_MVAL<<16)|(APLL_PVAL<<8)|(APLL_SVAL))
				str		r1, [r0,#0xC]			; APLL_CON Register
				
				;; MPLL M,P,S Value & Enable
				ldr		r1, =((1<<31)|(MPLL_MVAL<<16)|(MPLL_PVAL<<8)|(MPLL_SVAL))
				str		r1, [r0,#0x10]			; MPLL_CON Register
				
				;;Select PLL clock out 
				ldr		r1, [r0, #0x1c]
				orr		r1,r1,#0x3
				str		r1, [r0,#0x1c]
	
				;;Expand Memory 1 Port to X32
				ldr		r1,	[r0, #0x120]
				bic		r1, #0x80				; ADDR_EXPAND to "0"
				str		r1,	[r0, #0x120]		; MEM_SYS_CFG Register
		
				mov		pc,lr
				
				ENDP
;-------------------------------------------------------

;---------------[SMC Initialize Routine]----------------
InitSmc			PROC

				; Initialize SMC
				
				mov		pc,lr
				
				ENDP

;-------------------------------------------------------


				LTORG
				

			   	ALIGN

			   	AREA IntVector, DATA, READWRITE

				^   Exception_Vector

HandleReset 	#   4
HandleUndef 	#   4
HandleSWI   	#   4
HandlePabort    #   4
HandleDabort    #   4
HandleReserved  #   4
HandleIRQ   	#   4
HandleFIQ   	#   4

		        END