hardware.lst
来自「电子竞赛—具有语音功能的RCL测试仪」· LST 代码 · 共 660 行 · 第 1/3 页
LST
660 行
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000001D8 00 00 .VAR R_ReadIndex;
000001D9 00 00 .VAR R_WriteIndex;
000091D6 .CODE
//////////////////////////////////////////////////////////////////
// Function: Send data to speech driver(PWM/DAC)
// Destory register: r4
//////////////////////////////////////////////////////////////////
F_SP_Send_PWM: //
000091D6 1C D9 16 70 [P_PWM] = r4; //
000091D8 90 9A retf; //
F_SP_Send_DAC1: //
000091D9 1C D9 17 70 [P_DAC1] = r4; //
000091DB 90 9A retf; //
F_SP_Send_DAC2: //
000091DC 1C D9 16 70 [P_DAC2] = r4; //
000091DE 90 9A retf; //
F_SP_Send_Two_DAC:
000091DF 1C D9 17 70 [P_DAC1] = r4; //
000091E1 1C D9 16 70 [P_DAC2] = r4; //
000091E3 90 9A retf;
//.DEFINE F_SP_Send_Out F_SP_Send_PWM;
//.DEFINE F_SP_Send_Out F_SP_Send_DAC1;
//.DEFINE F_SP_Send_Out F_SP_Send_DAC2;
.DEFINE F_SP_Send_Out F_SP_Send_Two_DAC; // Send to both DAC1 and DAC2
F_SP_Get_ADC:
000091E4 14 99 14 70 R4 = [P_ADC]
000091E6 90 9A retf
F_SP_Set_P_TimerA_Ctrl:
000091E7 19 D3 0B 70 [P_TimerA_Ctrl] = R1
000091E9 90 9A RETF
F_SP_Set_P_TimerA_Data:
000091EA 19 D3 0A 70 [P_TimerA_Data] = R1
000091EC 90 9A RETF
F_SP_Set_P_TimerB_Ctrl:
000091ED 19 D3 0D 70 [P_TimerB_Ctrl] = R1
000091EF 90 9A RETF
F_SP_Set_P_TimerB_Data:
000091F0 19 D3 0C 70 [P_TimerB_Data] = R1
000091F2 90 9A RETF
F_SP_Set_P_INT_Ctrl:
000091F3 19 D3 10 70 [P_INT_Ctrl] = R1
000091F5 90 9A RETF
F_SP_Set_P_INT_Clear:
000091F6 19 D3 11 70 [P_INT_Clear] = R1
000091F8 90 9A RETF
F_SP_Set_P_SystemClock:
000091F9 19 D3 13 70 [P_SystemClock] = R1
000091FB 90 9A RETF
F_SP_Set_P_DAC_Ctrl:
000091FC 19 D3 2A 70 [P_DAC_Ctrl] = R1
000091FE 90 9A RETF
F_SP_Set_P_ADC_Ctrl:
000091FF 19 D3 15 70 [P_ADC_Ctrl] = R1
00009201 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: Interrupt vector setting
// Used register: R1
//////////////////////////////////////////////////////////////////
F_SP_Write_INT_Status: //write interrupt status
00009202 19 D3 A4 01 [R_InterruptStatus] = R1; //
00009204 90 9A retf;
F_SP_Read_INT_Status: //read interrupt status
00009205 11 93 A4 01 R1 = [R_InterruptStatus]; //
00009207 90 9A retf;
//////////////////////////////////////////////////////////////////
//
//////////////////////////////////////////////////////////////////
_SP_Init_IOA: .PROC
00009208 88 DA PUSH BP,BP TO [SP];
00009209 08 0B 01 00 BP = SP + 1;
0000920B 88 D2 PUSH R1,R1 TO [SP];
0000920C 03 92 R1 = [BP+3]; // Port direction
0000920D 19 D3 02 70 [P_IOA_Dir] = R1;
0000920F 04 92 R1 = [BP+4];
00009210 19 D3 00 70 [P_IOA_Data] = R1;
00009212 05 92 R1 = [BP+5];
00009213 19 D3 03 70 [P_IOA_Attrib] = R1;
00009215 88 90 POP R1,R1 FROM [SP];
00009216 88 98 POP BP,BP FROM [SP];
00009217 90 9A RETF;
.ENDP
//////////////////////////////////////////////////////////////////
// SP_Inti_IOB
//////////////////////////////////////////////////////////////////
_SP_Init_IOB: .PROC
00009218 88 DA PUSH BP,BP TO [SP];
00009219 08 0B 01 00 BP = SP + 1;
0000921B 88 D2 PUSH R1,R1 TO [SP];
0000921C 03 92 R1 = [BP+3]; // Port direction
0000921D 19 D3 07 70 [P_IOB_Dir] = R1;
0000921F 04 92 R1 = [BP+4];
00009220 19 D3 05 70 [P_IOB_Data] = R1;
00009222 05 92 R1 = [BP+5];
00009223 19 D3 08 70 [P_IOB_Attrib] = R1;
00009225 88 90 POP R1,R1 FROM [SP];
00009226 88 98 POP BP,BP FROM [SP];
00009227 90 9A RETF;
.ENDP
_SP_Import: .PROC
00009228 88 DA PUSH BP,BP TO [SP];
00009229 08 0B 01 00 BP = SP + 1;
0000922B 90 D4 PUSH R1,R2 TO [SP];
0000922C 03 92 R1 = [BP+3]; // Port Number
0000922D 04 94 R2 = [BP+4]; // Data Buffer Pointer
0000922E C1 92 R1 = [R1] ;
0000922F C2 D2 [R2] = R1 ;
00009230 90 90 POP R1,R2 FROM [SP];
00009231 88 98 POP BP,BP FROM [SP];
00009232 90 9A RETF;
.ENDP
_SP_Export: .PROC
00009233 88 DA PUSH BP,BP TO [SP];
00009234 08 0B 01 00 BP = SP + 1;
00009236 90 D4 PUSH R1,R2 TO [SP];
00009237 03 92 R1 = [BP+3]; // Port Number
00009238 04 94 R2 = [BP+4]; // Value
00009239 C1 D4 [R1] = R2 ;
0000923A 90 90 POP R1,R2 FROM [SP];
0000923B 88 98 POP BP,BP FROM [SP];
0000923C 90 9A RETF;
.ENDP
///////////////////////////////////////
_SP_RampUpDAC1: .PROC
F_SP_RampUpDAC1:
0000923D 90 D4 push r1,r2 to [sp];
0000923E 11 93 17 70 r1=[P_DAC1];
00009240 09 B3 C0 FF r1 &= ~0x003f;
00009242 09 43 00 80 cmp r1,0x8000
00009244 0E 0E jb L_RU_NormalUp;
00009245 19 5E je L_RU_End;
L_RU_DownLoop:
00009246 40 F0 A9 92 call F_Delay;
00009248 41 94 r2 = 0x0001;
00009249 1A D5 12 70 [P_Watchdog_Clear] = r2;
0000924B 09 23 40 00 r1 -= 0x40;
0000924D 19 D3 17 70 [P_DAC1] = r1;
0000924F 09 43 00 80 cmp r1,0x8000;
00009251 4C 4E jne L_RU_DownLoop;
L_RD_DownEnd:
00009252 0C EE jmp L_RU_End;
L_RU_NormalUp:
L_RU_Loop:
00009253 40 F0 A9 92 call F_Delay;
00009255 41 94 r2 = 0x0001;
00009256 1A D5 12 70 [P_Watchdog_Clear] = r2;
00009258 09 03 40 00 r1 += 0x40;
0000925A 19 D3 17 70 [P_DAC1] = r1;
0000925C 09 43 00 80 cmp r1, 0x8000;
0000925E 4C 4E jne L_RU_Loop;
L_RU_End:
0000925F 90 90 pop r1,r2 from [sp];
00009260 90 9A retf;
.ENDP
///////////////////////////////////////
_SP_RampDnDAC1: .PROC
F_SP_RampDnDAC1:
00009261 90 D4 push r1,r2 to [sp];
//int off;
00009262 11 93 17 70 r1 = [P_DAC1];
00009264 09 B3 C0 FF r1 &= ~0x003F;
00009266 0A 5E jz L_RD_End;
L_RD_Loop:
00009267 40 F0 A9 92 call F_Delay;
00009269 41 94 r2 = 0x0001;
0000926A 1A D5 12 70 [P_Watchdog_Clear] = r2;
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